X22C12
1K Bit
X22C12
256 x 4
Nonvolatile Static RAM
FEATURES
DESCRIPTION
• High Performance CMOS
The X22C12 is a 256 x 4 CMOS NOVRAM featuring a
high-speed static RAM overlaid bit-for-bit with a non-
volatile E2PROM. The NOVRAM design allows data to
be easily transferred from RAM to E2PROM (STORE)
and from E2PROM to RAM (RECALL). The STORE
operation is completed within 5ms or less and the
RECALL is completed within 1µs.
—150ns RAM Access Time
• High Reliability
—Store Cycles: 1,000,000
—Data Retention: 100 Years
• Low Power Consumption
—Active: 40mA Max.
—Standby: 100µA Max.
XicorNOVRAMsaredesignedforunlimitedwriteopera-
tions to the RAM, either RECALLs from E2PROM or
writes from the host. The X22C12 will reliably endure
1,000,000 STORE cycles. Inherent data retention is
greater than 100 years.
• Infinite Array Recall, RAM Read and Write Cycles
• Nonvolatile Store Inhibit: VCC = 3.5V Typical
• Fully TTL and CMOS Compatible
• JEDEC Standard 18-Pin 300-mil DIP
• 100% Compatible with X2212
—With Timing Enhancements
FUNCTIONAL DIAGRAM
PIN CONFIGURATION
PLASTIC DIP
CERDIP
2
NONVOLATILE E PROM
MEMORY ARRAY
A
A
A
A
A
A
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
A
A
7
4
3
2
1
0
CC
6
STORE
A
0
A
ARRAY
RECALL
1
5
ROW
SELECT
STATIC RAM
MEMORY ARRAY
A
A
A
I/O
I/O
I/O
I/0
2
3
4
4
3
2
X22C12
CS
1
V
CC
V
WE
STORE
RECALL
CONTROL
LOGIC
SS
STORE
V
SS
RECALL
COLUMN
I/O CIRCUITS
3817 FHD F02
I/O
1
COLUMN SELECT
INPUT
DATA
I/O
2
SOIC
CONTROL
I/O
3
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
A7
A
4
A
3
A
2
A
1
A
0
CC
A
6
A
5
I/O
4
A
A
A
5
7
6
I/O
4
X22C12
NC
NC
I/O
3
I/O
2
I/O
1
CS
CS
V
SS
WE
STORE
WE
RECALL
3817 FHD F01
3815 FHD F10.1
© Xicor, Inc. 1991, 1995 Patents Pending
3817-2.4 7/30/96 T0/C0/D1 SH
Characteristics subject to change without notice
1