WS512K32V-XXX
*ADVANCED
512Kx32 SRAM 3.3V MODULE
FEATURES
Access Times of 70, 85, 100, 120ns
Low Voltage Operation:
• 3.3V ± 10% Power Supply
Low Power CMOS
Packaging
• 66-pin, PGA Type, 1.185 inch square, Hermetic Ceramic
HIP (Package 401)
Built-in Decoupling Caps and Multiple Ground Pins for Low
• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880 inch),
4.57mm (0.180") high (Package 510). Designed to fit
JEDEC 68 lead 0.990" CQFJ footprint
Noise Operation
Weight
• WS512K32V-XG2TX - 8 grams typical
WS512K32V-XHX - 13 grams typical
Organized as 512Kx32; User Configurable as 1024Kx16 or
2Mx8
Commercial, Industrial and Military Temperature Ranges
TTL Compatible Inputs and Outputs
* This product is under development, is not qualified or characterized and is subject to change or
cancellation without notice.
Pin Description
PIN CONFIGURATION FOR WS512K32NV-XHX
Top View
I/O0-31
A0-18
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
WE1-4
#
1
12
23
34
45
56
CS1-4
OE#
VCC
#
I/O8
I/O9
I/O10
A13
WE2#
CS2#
GND
I/O11
A10
I/O15
I/O14
I/O13
I/O12
OE#
A18
I/O24
I/O25
I/O26
A6
VCC
CS4#
WE4#
I/O27
A3
I/O31
I/O30
I/O29
I/O28
A0
Output Enable
Power Supply
Ground
GND
NC
Not Connected
A14
A7
A15
A11
NC
A4
A1
Block Diagram
A16
A12
WE1#
I/O7
A8
A5
A2
WE
1
#
CS
1
#
WE
2
#
CS
2
#
WE
3
#
CS
3
#
4 4
WE # CS #
A17
VCC
A9
WE3#
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
OE#
A0-18
I/O0
I/O1
I/O2
CS1#
NC
I/O6
I/O16
I/O17
I/O18
512K x 8
512K x 8
512K x 8
512K x 8
I/O5
I/O3
I/O4
8
8
8
8
11
22
33
44
55
66
I/O0-7
I/O8-15
I/O16-23
I/O24-31
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2011 © 2011 Microsemi Corporation. All rights reserved.
Rev. 3
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com