Datasheet > WS1M8L-17FIA

WS1M8L-17FIA

更新时间： 2024-11-02 09:48:31

品牌	Logo	应用领域
WEDC		静态存储器
页数	文件大小	规格书
6页	162K
描述
Standard SRAM, 1MX8, 17ns, CMOS, CDFP36, CERAMIC, FP-36

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数据手册

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WS1M8L-17FIA 数据手册

WS1M8-XXX

HI-RELIABILITY PRODUCT

2x512Kx8 DUALITHIC™ SRAM

FEATURES

■ Access Times 17, 20, 25, 35, 45, 55ns

■ Organized as two banks of 512Kx8

■ Revolutionary, Center Power/Ground Pinout

■ Commercial, Industrial and Military Temperature Ranges

■ 5 Volt Power Supply

■ Packaging:

• 32 pin, Hermetic Ceramic DIP (Package 300)

• 36 lead Ceramic SOJ (Package 100)

• 36 lead Ceramic Flatpack (Package 226)

■ Low Power CMOS

■ TTL Compatible Inputs and Outputs

PIN CONFIGURATION FOR WS1M8-XDJX

AND WS1M8-XFX

PIN CONFIGURATION FOR WS1M8-XCX

32 DIP

36 CSOJ

36 FLATPACK

TOP VIEW

A18

A16

A14

A12

VCC

31 A15

30 A17

29 WE

28 A13

27 A8

A18

A17

A16

A15

CS1

I/O0

I/O1

26 A9

I/O7

I/O6

GND

25 A11

24 CS2

23 A10

22 CS1

21 I/O7

20 I/O6

19 I/O5

18 I/O4

17 I/O3

VCC

GND

I/O2

I/O3

VCC

I/O5

I/O4

A14

A13

A12

A11

A10

CS2

I/O0

I/O1

I/O2

GND

PIN DESCRIPTION

A0-18

Address Inputs

Data Input/Output

Chip Selects

Output Enable

Write Enable

+5.0V Power

Ground

A0-18

Address Inputs

Data Input/Output

Chip Selects

Write Enable

+5.0V Power

Ground

I/O0-7

CS1-2

VCC

I/O0-7

CS1-2

VCC

GND

BLOCK DIAGRAM

I/O0-7

0-18

512K x 8

CS1⁽¹⁾

CS2⁽¹⁾

CS1⁽¹⁾

CS2⁽¹⁾

NOTE:

1. CS¹and CS2 are used to select the lower and upper 512Kx8 of the device. CS1 and CS2 must not be enabled at the same time.

October 2000 Rev. 4

White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com

12 3 4 5 6

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