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WMS128K8L-85DRCEA PDF预览

WMS128K8L-85DRCEA

更新时间: 2024-11-24 05:12:31
品牌 Logo 应用领域
WEDC 静态存储器
页数 文件大小 规格书
8页 107K
描述
Standard SRAM, 128KX8, 85ns, CMOS, CDSO32, CERAMIC, SOJ-32

WMS128K8L-85DRCEA 数据手册

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WMS128K8-XXX  
HI-RELIABILITY PRODUCT  
128Kx8 MONOLITHIC SRAM, SMD 5962-96691 (pending)  
FEATURES  
Commercial, Industrial and Military Temperature Range  
5 Volt Power Supply  
Access Times 70, 85, 100, 120ns  
Revolutionary, Center Power/Ground Pinout  
JEDEC Approved  
• 32 lead Ceramic SOJ (Package 101)  
Low Power CMOS  
2V Data Retention Devices Available  
Evolutionary, Corner Power/Ground Pinout  
(Low Power Version)  
JEDEC Approved  
TTL Compatible Inputs and Outputs  
• 32 pin Ceramic DIP (Package 300)  
• 32 lead Ceramic SOJ (Package 101)  
• 32 lead Ceramic Flat Pack (Package 206)  
MIL-STD-883 Compliant Devices Available  
REVOLUTIONARY PINOUT  
EVOLUTIONARY PINOUT  
32 DIP  
32 CSOJ (DE)  
32 FLATPACK (FE)  
32 CSOJ (DR)  
TOP VIEW  
TOP VIEW  
A0  
A1  
1
32 A16  
31 A15  
30 A14  
29 A13  
28 OE  
27 I/O8  
26 I/O7  
25 GND  
NC  
A16  
A14  
A12  
A7  
1
32  
VCC  
2
2
31 A15  
30 NC/CS2*  
29 WE  
28 A13  
27 A8  
A2  
3
3
A3  
4
4
CS  
5
5
I/O1  
I/O2  
6
A6  
6
7
A5  
7
26 A9  
VCC  
8
A4  
8
25 A11  
24 OE  
23 A10  
22 CS  
GND  
I/O3  
I/O4  
WE  
A4  
9
24  
VCC  
A3  
9
10  
11  
12  
13  
14  
15  
16  
23 I/O6  
22 I/O5  
21 A12  
20 A11  
19 A10  
18 A9  
A2  
10  
11  
12  
13  
14  
15  
16  
A1  
A0  
21 I/O7  
20 I/O6  
19 I/O5  
18 I/O4  
17 I/O3  
I/O0  
I/O1  
I/O2  
GND  
A5  
A6  
A7  
17 A8  
* NC for single chip select devices  
CS2 for dual chip select devices  
PIN DESCRIPTION  
A0-16  
I/O 0-7  
CS  
Address Inputs  
DataInput/Output  
ChipSelect  
OutputEnable  
WriteEnable  
+5.0VPower  
Ground  
OE  
WE  
VCC  
GND  
February 2000 Rev. 2  
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  

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