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WM8804GEDS/V

更新时间： 2024-11-23 19:29:59
品牌 Logo 应用领域
凌云 - CIRRUS 光电二极管商用集成电路
页数 文件大小 规格书
66页 710K
描述
Consumer Circuit, CMOS, PDSO20, 7.20 X 5.30 MM, 1.75 MM HEIGHT, LEAD FREE, MO-150AE, SSOP-20

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WM8804GEDS/V 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：SSOP,Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：1.65
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：R-PDSO-G20
长度：7.2 mm功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH座面最大高度：2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：5.3 mmBase Number Matches：1

WM8804GEDS/V 数据手册

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WM8804  
w
1:1 Digital Interface Transceiver with PLL  
DESCRIPTION  
FEATURES  
•
•
S/PDIF (IEC60958-3) compliant.  
The WM8804 is a high performance consumer mode  
S/PDIF transceiver with support for 1 received channel and  
1 transmitted channel.  
Advanced jitter attenuating PLL with low intrinsic period  
jitter of 50 ps RMS.  
•
S/PDIF recovered clock using PLL, or stand alone crystal  
derived clock generation.  
A crystal derived, or externally provided high quality master  
clock is used to allow low jitter recovery of S/PDIF supplied  
master clocks.  
•
•
•
Supports 10 – 27MHz crystal clock frequencies.  
2-wire / 3-Wire serial or hardware control interface.  
Programmable audio data interface modes:  
Generation of all typically used audio clocks is possible  
using the high performance internal PLL. A dedicated  
CLKOUT pin provides a high drive clock output.  
-
-
I2S, Left, Right Justified or DSP  
16/20/24 bit word lengths  
A pass through option is provided which allows the device  
simply to be used to clean up (de-jitter) the received digital  
audio signals.  
•
•
•
•
•
•
•
•
1 channel receiver input and 1 channel transmit output.  
Auto frequency detection / synchronisation.  
Selectable output status data bits.  
The device may be used under software control or stand  
alone hardware control modes. In software control mode,  
both 2-wire with read back and 3-wire interface modes are  
supported.  
Up to 3 configurable GPO pins.  
De-emphasis flag output.  
Non-audio detection including DOLBYTM and DTSTM  
.
Channel status changed flag.  
Status and error monitoring is built-in and results can be  
read back over the control interface, on the GPO pins or  
streamed over the audio data interface in ‘With Flags’ mode  
(audio data with status flags appended).  
Configurable clock distribution with selectable output  
MCLK rate of 512fs, 256fs, 128fs and 64fs.  
•
•
2.7 to 3.6V digital and PLL supply voltages.  
20-lead SSOP package.  
The audio data interface supports I2S, left justified, right  
justified and DSP audio formats of 16-24 bit word length,  
with sample rates from 32 to 192ks/s.  
APPLICATIONS  
•
•
•
•
AV processors and Hi-Fi systems  
Music industry applications  
DVD-P/DVD-RW  
The device is supplied in a 20-lead Pb-free SSOP package.  
Digital TV  
BLOCK DIAGRAM  
WOLFSON MICROELECTRONICS plc  
Production Data, March 2009, Rev 4.5  
Copyright ©2009 Wolfson Microelectronics plc  
To receive regular email updates, sign up at http://ww.wolfsonmicro.omenews/  
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