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WM8235GEFL/V PDF预览

WM8235GEFL/V

更新时间: 2024-01-07 00:42:48
品牌 Logo 应用领域
凌云 - CIRRUS /
页数 文件大小 规格书
154页 1853K
描述
Analog Circuit, 1 Func, CMOS, PQCC56, QFN-56

WM8235GEFL/V 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:2.15
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:S-PQCC-N56
长度:7 mm湿度敏感等级:3
功能数量:1端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260座面最大高度:0.9 mm
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.97 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

WM8235GEFL/V 数据手册

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WM8235  
210MSPS 9-Channel AFE with Sensor  
Timing Generation and LVDS/CMOS Data Output  
DESCRIPTION  
FEATURES  
210MSPS conversion rate  
The WM8235 is a 16-bit analogue front end/digitiser IC  
which processes and digitises the analogue output signals  
from CCD sensors or Contact Image Sensors (CIS) at pixel  
sample rates of up to 23MSPS per channel.  
16-bit ADC resolution  
Current consumption 390mA  
3.3V single supply operation  
The device has nine analogue signal processing channels  
each of which contains Reset Level Clamping, Correlated  
Double Sampling (also Sample and Hold), Programmable  
Gain, Automatic Gain Control (AGC) and Offset adjust  
functions.  
Sample and hold / correlated double sampling  
Programmable offset adjust (8-bit resolution)  
Flexible clamp timing  
Pixel clamp / line clamp mode  
Programmable clamp voltage  
The output from each of these channels is time multiplexed,  
in pairs, into three high-speed 16-bit Analogue to Digital  
Converters. The digital data is available in a variety of  
output formats via the flexible data port.  
Programmable CIS/CCD timing generator  
Internally generated voltage references  
Compliant for Spread Spectrum Clock  
LVDS/CMOS output options  
The WM8235 has a user selectable LVDS or CMOS output  
architecture.  
LVDS 5pair 490MHz 35-bit data  
CMOS 90MHz output maximum  
An internal 5-bit DAC is supplied for internal reference level  
generation. This may be used during CDS to reference CIS  
signals or during clamping to clamp CCD signals. An  
external reference level may also be supplied. ADC  
references are generated internally, ensuring optimum  
performance from the device.  
Complete on chip clock generator. MCLK 5MHz to 23MHz  
Internal timing adjustment  
Automatic Gain Control  
Automatic Black Level Calibration  
56-lead QFN package 7mm x 7mm  
Serial control interface  
A programmable automatic Black-Level Calibration function  
is available to adjust the DC offset of the output data.  
The WM8235 features a sensor timing clock generator for  
both CCD and CIS sensors. The clock generator can accept  
a slow or fast reference clock input and also has a flexible  
timing adjustment function for output timing clocks to allow  
use of many different sensors.  
APPLICATIONS  
Digital copiers  
USB2.0 compatible scanners  
Multi-function peripherals  
High-speed CCD/CIS sensor interface  
Rev 4.6  
APR ‘16  
Copyright Cirrus Logic, Inc., 20102016  
http://www.cirrus.com  
(All Rights Reserved)  
 
 
 

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