4Mx32 5V NOR FLASH MODULE
WF4M32-XXX5
FEATURES
Access Times of 100, 120, 150ns
5 Volt Read and Write
Low Power CMOS
Packaging:
• 66 pin, PGA Type, 1.385" square, Hermetic Ceramic HIP
(Package 402).
Data# Polling and Toggle Bit feature for detection of
program or erase cycle completion.
• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square
(Package 509) 4.57mm (0.180") height. Designed to fit
JEDEC 68 lead 0.990CQFJ footprint (Fig. 3)
Supports reading or programming data to a sector not being
erased.
RESET# pin resets internal state machine to the read
Sector Architecture
mode.
• 32 equal size sectors of 64KBytes per each 2Mx8 chip
Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation, Separate Power and Ground Planes to
improve noise immunity
• Any combination of sectors can be erased. Also supports
full chip erase.
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 4Mx32
* This product is subject to change without notice.
Note: For programming information and waveforms refer to Flash Programming 16M5 Application
Note AN0038. RY/BY# function and timings don't apply to this device.
User configurable as 2x4Mx16 or 4x4Mx8 in HIP.
Commercial, Industrial, and Military Temperature Ranges
FIGURE 1 – PIN CONFIGURATION FOR
WF4M32-XH2X5
PIN DESCRIPTION
I/O0-31
A0-21
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Select
Output Enable
Power Supply
Ground
Top View
WE#
1
12
23
34
45
56
CS1-4
#
OE#
VCC
I/O8
I/O9
I/O10
A14
A16
A11
A0
RESET#
CS2#
GND
I/O11
A10
I/O15
I/O14
I/O13
I/O12
OE#
A17
I/O24
I/O25
I/O26
A7
VCC
CS4#
NC
I/O31
I/O30
I/O29
I/O28
A1
VSS
RESET#
Reset
I/O27
A4
A12
BLOCK DIAGRAM
A9
A21
A5
A2
CS1#
CS2#
CS3#
CS4#
A21
A15
WE#
I/O7
A13
A6
A3
A18
I/O0
I/O1
I/O2
VCC
A8
A20
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
OE#
WE#
CS1#
A19
I/O6
I/O16
I/O17
I/O18
A0-20
RESET#
2M x 8
2M x 8
2Mx 8
2M x 8
I/O5
2M x 8
2M x 8
2M x 8
2M x 8
I/O3
I/O4
11
22
33
44
55
66
I/O16-23
I/O24-31
I/O0-7
I/O8-15
1
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
4340.13E-0816-ss-WF4M32-XXX5