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WF4M32-100G2TM5 PDF预览

WF4M32-100G2TM5

更新时间: 2024-02-26 16:27:08
品牌 Logo 应用领域
WEDC 闪存存储内存集成电路
页数 文件大小 规格书
15页 310K
描述
4Mx32 5V FLASH MODULE

WF4M32-100G2TM5 数据手册

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WF4M32-XXX5  
White Electronic Designs  
PRELIMINARY*  
4MX32 5V FLASH MODULE, SMD 5962-97612 (pending)  
FEATURES  
n
Organized as 4Mx32  
n
Access Times of 100, 120, 150ns  
n
User configurable as 8Mx16 or 16Mx8 in HIP and  
G4T packages.  
n
Packaging:  
n
n
n
n
Commercial, Industrial, and Military Temperature Ranges  
5 Volt Read and Write. 5V 10ꢀ Supply.  
Low Power CMOS  
• 66 pin, PGA Type, 1.385" square, Hermetic  
Ceramic HIP (Package 402).  
• 68 lead, 40mm Low Profile CQFP ( Package  
502 ), 3.5mm (0.140") height.  
Data Polling and Toggle Bit feature for detection of  
program or erase cycle completion.  
• 68 lead, Hermetic CQFP (G2T), 22.4mm  
(0.880") square (Package 509) 4.57mm  
(0.180") height. Designed to fit JEDEC 68  
lead 0.990CQFJ footprint (Fig. 3)  
n
n
n
Supports reading or programming data to a sector  
not being erased.  
RESET pin resets internal state machine to the read  
mode.  
n
n
Sector Architecture  
• 32 equal size sectors of 64KBytes per each  
2Mx8 chip  
Built-in Decoupling Caps and Multiple Ground  
Pins for Low Noise Operation, Separate Power  
and Ground Planes to improve noise immunity  
• Any combination of sectors can be erased. Also  
supports full chip erase.  
*This data sheet describes a product under development, not fully  
characterized, and is subject to change without notice.  
Minimum 100,000 Write/Erase Cycles Minimum  
Note:  
For programming information refer to Flash Programming 16M5 Application Note.  
FIGꢀ 1 PIN CONFIGURATION FOR WF4M32-XH2X5  
TOP VIEW  
PIN DESCRIPTION  
I/O0-31 DataInputs/Outputs  
1
12  
23  
34  
45  
56  
A0-21  
WE  
AddressInputs  
WriteEnables  
ChipSelects  
OutputEnable  
PowerSupply  
Ground  
I/O  
8
9
RESET  
I/O15  
I/O14  
I/O13  
I/O12  
OE  
I/O24  
I/O25  
I/O26  
V
CC  
I/O31  
I/O30  
I/O29  
I/O28  
CS1-4  
OE  
I/O  
CS  
2
CS4  
I/O10  
GND  
I/O11  
NC  
VCC  
GND  
RESET  
A
A
A
A
A
14  
16  
11  
0
A
7
I/O27  
Reset  
A
A
A
V
10  
A
A
A
12  
21  
13  
A
A
A
4
5
6
A1  
A2  
A3  
9
A17  
BLOCK DIAGRAM  
15  
CC  
WE  
CS  
CS  
CS  
3
CS  
4
1
2
A
21  
18  
I/O  
I/O  
I/O  
I/O  
7
A
8
A20  
CS  
I/O23  
I/O22  
I/O21  
I/O20  
I/O0  
I/O1  
I/O2  
CS  
1
6
5
4
I/O16  
I/O17  
I/O18  
3
OE  
WE  
A
0-20  
A19  
GND  
I/O19  
RESET  
2M x 8  
2M x 8  
2Mx 8  
2M x 8  
I/O3  
2M x 8  
2M x 8  
2M x 8  
2M x 8  
11  
22  
33  
44  
55  
66  
I/O16-23  
I/O24-31  
I/O0-7  
I/O8-15  
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com  
August2002 Rev4  

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