Datasheet > WED2ZL362MSJ35ES

WED2ZL362MSJ35ES

更新时间： 2023-03-15 00:00:00

品牌	Logo	应用领域
WEDC		静态存储器
页数	文件大小	规格书
12页	276K
描述
SRAM Module, 2MX36, 3.5ns, CMOS, PBGA119, PLASTIC, BGA-119

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数据手册

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WED2ZL362MSJ35ES 数据手册

WED2ZL362MSJ

White Electronic Designs

72Mb, 2M x 36 Synchronous Pipeline Burst NBL SRAM Advanced

FEATURES

DESCRIPTION

n Fast clock speed: 225, 200, 166 and 150MHz

n Fast access times: 2$8, 3$0, 3$5 and 3$8ns

n Fast OE access times: 2$8, 3$0, 3$5 and 3$8ns

n Separate Core and I/O Power Supply

n Snooze Mode for reduced-standby power

n Individual Byte Write control

The WEDC SyncBurst - SRAM family employs high-

speed, low-power CMOS designs that are fabricated

using an advanced CMOS process$ WEDCs 72Mb

SyncBurst SRAMs integrate two 2M x 18 SRAMs into a

single BGA package to provide a 2M x 36 configuration$

All synchronous inputs pass through registers con-

trolled by a positive-edge-triggered single-clock input

(CLK)$ The NBL or No Bus Latency Memory utilizes all

the bandwidth in any combination of operating cycles$

Address, data inputs, and all control signals except

output enable and linear burst order are synchronized

to input clock$ Burst order control must be tied High or

Low$ Asynchronous inputs include the sleep mode en-

able (ZZ) and Output Enable (OE)$ Write cycles are in-

ternally self-timed and initiated by the rising edge of the

clock input$ This feature eliminates complex off-chip

write pulse generation and provides increased timing

flexibility for incoming signals$

n Clock-controlled and registered addresses, data I/Os

and control signals

n Burst control (interleaved or linear burst)

n Packaging:

119-bump BGA package, JEDEC Pin Definition

n Low capacitive bus loading

FIGꢀ 1 PIN CONFIGURATION

(TOP VIEW)

BLOCK DIAGRAM

VDDQ

CE₂

ADV

VDD

CE₂

DQC

VDDQ

DQC

VDDQ

DQD

VDDQ

DQD

DQPC

DQC

VDD

VSS

BWC

VSS

BWB

VSS

DQPB

DQB

VDD

DQB

VDDQ

DQB

VDDQ

DQA

VDDQ

DQA

2M x 18

CE₁

CLK

CKE

ADV

LBO

CE1

CE2

CLK

CKE

ADV

LBO

CS1

CS2

CLK

CKE

ADV

LBO

CS1

CS2

VDD

CLK

DQD

DQPD

VSS

BWD

VSS

LBO

VSS

BWA

VSS

DQA

DQPA

Address Bus

(SA0 ñ SA20)

CKE

SA₁

SA₀

VDD

, DQD

A, DQ

DQPC

, DQPD

DQPA, DQPB

DQP

VDDQ

RFU

VDDQ

DQPD

July 2002 Rev 0

ECO # 15239

White Electronic Designs Corporation (508) 366-5151 wwwꢀwhiteedcꢀcom

12 3 4 5 6 7...12

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与WED2ZL362MSJ35ES相关器件

型号	品牌	获取价格	描述	数据表
WED2ZL362MSJ38BI	WEDC	获取价格	SRAM Module, 2MX36, 3.8ns, CMOS, PBGA119, PLASTIC, BGA-119
WED2ZL362MSJ38ES	WEDC	获取价格	SRAM Module, 2MX36, 3.8ns, CMOS, PBGA119, PLASTIC, BGA-119
WED2ZL64512S	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S35BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S38BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S42BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S50BC	WEDC	获取价格	512K x 64 Synchronous Pipeline NBL SRAM
WED2ZL64512S-BC	ETC	获取价格	NBL SSRAM MCP
WED2ZLRSP01S	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM
WED2ZLRSP01S35BC	WEDC	获取价格	512K x 32/256K x 32 Dual Array Synchronous Pipeline Burst NBL SRAM

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