Datasheet > WCMA1008U1X-SF55

WCMA1008U1X-SF55

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
韦达 - WEIDA		/
页数	文件大小	规格书
12页	235K
描述
128K x 8 Static RAM

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数据手册

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WCMA1008U1X-SF55 数据手册

A1008U1X

WCMA1008U1X

128K x 8 Static RAM

ic power-down feature, reducing the power consumption by

over 99% when deselected.

Features

• High Speed

Writing to the device is accomplished by taking Chip Enable

one (CE₁) and Write Enable (WE) inputs LOW and the Chip

Enable two (CE₂) input HIGH. Data on the eight I/O pins (I/O₀

through I/O₇) is then written into the location specified on the

address pins (A₀through A₁₆).

— 55ns and 70ns availability

• Voltage range

— 2.7V–3.6V

• Ultra low active power

— Typical active current: 20 mA @ f = f_max(70ns speed)

• Low standby power

• Easy memory expansion with CE and OE features

• Automatic power-down when deselected

• CMOS for optimum speed/power

Reading from the device is accomplished by taking Chip En-

able one (CE₁) and Output Enable (OE) LOW while forcing

Write Enable (WE) and Chip Enable two (CE₂) HIGH. Under

these conditions, the contents of the memory location speci-

fied by the address pins will appear on the I/O pins.

The eight input/output pins (I/O₀through I/O₇) are placed in a

high-impedance state when the device is deselected (CE₁

HIGH or CE₂LOW), the outputs are disabled (OE HIGH), or

during a write operation (CE₁LOW, CE₂HIGH, and WE LOW).

Functional Description

The WCMA1008U1X is a high-performance CMOS static

RAM organized as 128K words by 8 bits. Easy memory expan-

sion is provided by an active LOW Chip Enable (CE₁), an ac-

tive HIGH Chip Enable (CE₂), an active LOW Output Enable

(OE) and three-state drivers. These devices have an automat-

The WCMA1008U1X is available in a 32 Lead TSOP and

STSOP packages.

Logic Block Diagram

Pin Configurations

A₁₁

A₉

A₈

A₁₃

CE₂

A₁₅

V_CC

A₁₆

A₁₄

A₁₂

A₇

A₆

A₅

A₄

A₁₀

2²⁶8

CE₁

I/O₇

I/O₆

I/O₅

I/O₄

I/O₃

GND

I/O₂

I/O₁

I/O₀

A₀

STSOP

Top View

(not to scale)

I/O

A₁

A₂

A₃

INPUT BUFFER

I/O

512x256x8

ARRAY

TSOP I

Top View

(not to scale)

I/O

GND

I/O

POWER

DOWN

COLUMN

DECODER

I/O

12 3 4 5 6 7...12

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