Datasheet > W946432AD-6

W946432AD-6

更新时间： 2024-01-23 05:40:12

品牌	Logo	应用领域
华邦 - WINBOND		时钟动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
40页	451K
描述
DDR DRAM, 2MX32, 0.1ns, CMOS, PQFP100

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技术参数
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W946432AD-6 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	包装说明：	LQFP, QFP100,.63X.87
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.02	风险等级：	5.88
访问模式：	FOUR BANK PAGE BURST	最长访问时间：	0.1 ns
其他特性：	AUTO/SELF REFRESH	最大时钟频率 (fCLK)：	166 MHz
I/O 类型：	COMMON	交错的突发长度：	2,4,8
JESD-30 代码：	R-PQFP-G100	JESD-609代码：	e0
长度：	20 mm	内存密度：	67108864 bit
内存集成电路类型：	DDR DRAM	内存宽度：	32
功能数量：	1	端口数量：	1
端子数量：	100	字数：	2097152 words
字数代码：	2000000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	2MX32	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	LQFP
封装等效代码：	QFP100,.63X.87	封装形状：	RECTANGULAR
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	2.5 V	认证状态：	Not Qualified
座面最大高度：	1.6 mm	自我刷新：	YES
连续突发长度：	2,4,8	子类别：	DRAMs
最大供电电压 (Vsup)：	2.65 V	最小供电电压 (Vsup)：	2.35 V
标称供电电压 (Vsup)：	2.5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	14 mm
Base Number Matches：	1

W946432AD-6 数据手册

W946432AD

512K ´ 4 BANKS ´ 32 BITS DDR SDRAM

GENERAL DESCRIPTION

The W946432AD is a high-speed CMOS Double Data Rate synchronous dynamic random access

memory organized as 512K words x 4 banks x 32 bits.

A bidirectional data strobe (DQS) is transmitted externally, along with data, for use in data capture at

the receiver. DQS is a strobe transmitted by the DDR SDRAM during READs and by the memory

controller during WRITEs. DQS is edge-aligned with data for READs and center-aligned with data for

WRITEs.

The W946432AD operates from a differential clock (CLK and CLK the crossing of CLK going HIGH

and CLK going LOW will be referred to as the postive edge of CLK). Commands (address and control

signals) are registered at every positive edge of CLK. Input data is registered on both edges of DQS,

and output data is referenced to both edges of DQS, as well as to both edges of CLK.

Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location

and continue for a programmed number of locations in a programmed sequence. Accesses begin with

the registration of an ACTIVE command, which is then followed by a READ or WRITE command. The

address bits registered coincident with the ACTIVE command are used to select the bank and row to

be accessed. The address bits registered coincident with the READ or WRITE command are used to

select the bank and the starting column location for the burst access.

The DDR SDRAM provides for programmable READ or WRITE burst lengths of 2, 4 or 8 locations. An

AUTO PRECHARGE function may be enabled to provide a self-timed row precharge that is initiated at

the end of the burst access.

As with standard SDRAMs, the pipelined, multibank architecture of DDR SDRAMs allows for

concurrent operation, thereby providing high effective bandwidth by hiding row precharge and

activation time.

FEATURES

·Double-data-rate architecture; two data transfers ·Four internal banks for concurrent operation

per clock cycle

·Data mask (DM) for write data

·Bidirectional, data strobe (DQS) is transmitted/

received with data, to be used in capturing data

at the receiver

·Burst lengths: 2, 4, or 8

·CAS Latency: 3

·AUTO PRECHARGE option for each burst

access

·DQS is edge-aligned with data for READs;

center-aligned with data for WRITEs

·Auto Refresh and Self Refresh Modes

·Differential clock inputs (CLK and CLK )

·15.6us Maximum Average Periodic Refresh

Interval

·DLL aligns DQ and DQS transitions with CLK

transitions

·2.5V (SSTL_2 compatible) I/O

·VDDQ = 2.5V ± 0.2V

·Programmable DLL on or DLL off mode

· Commands entered on each positive CLK edge;

data and data mask referenced to both edges of

DQS

·VDD = 2.5V ± 0.2V

PRELIMINARY DATA:9/8/00

12 3 4 5 6 7...40

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与W946432AD-6相关器件

型号	品牌	描述	获取价格	数据表
W9464G2IB-4	WINBOND	DDR DRAM, 512KX32, 0.6ns, CMOS, PBGA144, 12 X 12 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LFBGA	获取价格
W9464G2IB-5	WINBOND	DDR DRAM, 512KX32, 0.7ns, CMOS, PBGA144, 12 X 12 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LFBGA	获取价格
W9464G6IB	WINBOND	1M × 4 BANKS × 16 BITS DDR SDRAM	获取价格
W9464G6IH	WINBOND	1M Ã 4 BANKS Ã 16 BITS DDR SDRAM	获取价格
W9464G6IH-4	WINBOND	DDR DRAM, 4MX16, 0.65ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66	获取价格
W9464G6IH-5	WINBOND	DDR DRAM, 4MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66	获取价格

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