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W9425G6KH-5I PDF预览

W9425G6KH-5I

更新时间: 2024-11-24 20:42:55
品牌 Logo 应用领域
华邦 - WINBOND 动态存储器双倍数据速率光电二极管内存集成电路
页数 文件大小 规格书
52页 1067K
描述
DDR DRAM, 16MX16, 0.7ns, CMOS, PDSO66, TSOP2-66

W9425G6KH-5I 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSOP2-66Reach Compliance Code:compliant
ECCN代码:EAR99风险等级:5.68
访问模式:FOUR BANK PAGE BURST最长访问时间:0.7 ns
其他特性:AUTO/SELF REFRESHJESD-30 代码:R-PDSO-G66
长度:22.22 mm内存密度:268435456 bit
内存集成电路类型:DDR DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:66字数:16777216 words
字数代码:16000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:16MX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP2封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1.2 mm自我刷新:YES
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

W9425G6KH-5I 数据手册

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W9425G6KH  
4 M 4 BANKS 16 BITS DDR SDRAM  
Table of Contents-  
1.  
2.  
3.  
4.  
5.  
6.  
7.  
8.  
GENERAL DESCRIPTION.............................................................................................................................4  
FEATURES....................................................................................................................................................4  
ORDER INFORMATION ................................................................................................................................4  
KEY PARAMETERS ......................................................................................................................................5  
PIN CONFIGURATION ..................................................................................................................................6  
PIN DESCRIPTION........................................................................................................................................7  
BLOCK DIAGRAM .........................................................................................................................................8  
FUNCTIONAL DESCRIPTION.......................................................................................................................9  
8.1  
8.2  
Power Up Sequence ..........................................................................................................................9  
Command Function..........................................................................................................................10  
8.2.1 Bank Activate Command......................................................................................................10  
8.2.2 Bank Precharge Command ..................................................................................................10  
8.2.3 Precharge All Command ......................................................................................................10  
8.2.4 Write Command ...................................................................................................................10  
8.2.5 Write with Auto-precharge Command...................................................................................10  
8.2.6 Read Command ...................................................................................................................10  
8.2.7 Read with Auto-precharge Command ..................................................................................10  
8.2.8 Mode Register Set Command ..............................................................................................11  
8.2.9 Extended Mode Register Set Command ..............................................................................11  
8.2.10 No-Operation Command ......................................................................................................11  
8.2.11 Burst Read Stop Command..................................................................................................11  
8.2.12 Device Deselect Command..................................................................................................11  
8.2.13 Auto Refresh Command.......................................................................................................11  
8.2.14 Self Refresh Entry Command...............................................................................................12  
8.2.15 Self Refresh Exit Command .................................................................................................12  
8.2.16 Data Write Enable /Disable Command.................................................................................12  
Read Operation................................................................................................................................12  
Write Operation ................................................................................................................................13  
Precharge.........................................................................................................................................13  
Burst Termination.............................................................................................................................13  
Refresh Operation............................................................................................................................13  
Power Down Mode...........................................................................................................................14  
Input Clock Frequency Change during Precharge Power Down Mode ............................................14  
8.3  
8.4  
8.5  
8.6  
8.7  
8.8  
8.9  
8.10 Mode Register Operation .................................................................................................................14  
8.10.1 Burst Length field (A2 to A0) ................................................................................................14  
8.10.2 Addressing Mode Select (A3)...............................................................................................15  
8.10.3 CAS Latency field (A6 to A4)................................................................................................16  
8.10.4 DLL Reset bit (A8)................................................................................................................16  
8.10.5 Mode Register /Extended Mode register change bits (BA0, BA1)........................................16  
8.10.6 Extended Mode Register field ..............................................................................................16  
8.10.7 Reserved field ......................................................................................................................16  
OPERATION MODE ....................................................................................................................................17  
9.  
Publication Release Date: Nov. 17, 2014  
Revision: A02  
- 1 -  

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