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W764M32V120SBI PDF预览

W764M32V120SBI

更新时间: 2024-11-20 03:17:31
品牌 Logo 应用领域
WEDC 闪存存储内存集成电路
页数 文件大小 规格书
16页 505K
描述
64Mx32 Flash Multi-Chip Package 3.0V Page Mode Flash Memory

W764M32V120SBI 数据手册

 浏览型号W764M32V120SBI的Datasheet PDF文件第2页浏览型号W764M32V120SBI的Datasheet PDF文件第3页浏览型号W764M32V120SBI的Datasheet PDF文件第4页浏览型号W764M32V120SBI的Datasheet PDF文件第5页浏览型号W764M32V120SBI的Datasheet PDF文件第6页浏览型号W764M32V120SBI的Datasheet PDF文件第7页 
W764M32V-XSBX  
White Electronic Designs  
ADVANCED*  
64Mx32 Flash Multi-Chip Package  
3.0V Page Mode Flash Memory  
FEATURES  
Single power supply operation  
• 3 volt read, erase, and program operations  
I/O Control  
Software features  
• Program Suspend and Resume: read other  
sectors before programming operation is  
completed  
• All input levels (address, control, and DQ input  
levels) and outputs are determined by voltage on  
• Erase Suspend and Resume: read/program other  
sectors before an erase operation is completed  
VIO input. VIO range is 1.65 to VCC  
• Data# polling and toggle bits provide status  
Secured Silicon Sector region  
• Unlock Bypass Program command reduces overall  
multiple-word programming time  
• 128-word/256-byte sector for permanent, secure  
identification through an 8-word/16-byte random  
Electronic Serial Number, accessible through a  
command sequence  
• CFI (Common Flash Interface) compliant: allows  
host system to identify and accommodate multiple  
flash devices  
• May be programmed and locked at the factory or  
by the customer  
Hardware features  
Flexible sector architecture  
• Advanced Sector Protection  
• Five hundred twelve 64 Kword (128 Kbyte) sectors  
• WP#/ACC input accelerates programming  
time (when high voltage is applied) for greater  
throughput during system production. Protects  
first or last sector regardless of sector protection  
settings  
• Two hundred fifty-six 64 Kword (128 Kbyte)  
sectors  
• One hundred twenty-eight 64 Kword (128 Kbyte)  
sectors  
• Hardware reset input (RESET#) resets device  
Compatibility with JEDEC standard  
• Ready/Busy# output (RY/BY#) detects program or  
erase cycle completion  
* This product is under development, is not qualified or characterized and is subject to  
change or cancellation without notice.  
• Provides software compatibility for single-power  
supply flash, and superior inadvertent write  
protection  
100,000 erase cycles per sector typical  
20-year data retention typical  
PERFORMANCE CHARACTERISTICS  
High Performance  
• 100, 120 ns  
• 8-word/16-byte page read buffer  
• 25 ns page read times  
• 16-word/32-byte write buffer reduces overall  
programming time for multiple-word updates  
Package option  
• 107 BGA, 14mm x 17mm  
• 1.0mm pitch  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
March 2006  
Rev. 2  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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