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W764M32V-100SBC PDF预览

W764M32V-100SBC

更新时间: 2024-11-21 05:54:07
品牌 Logo 应用领域
玛居礼 - MERCURY 内存集成电路闪存
页数 文件大小 规格书
16页 919K
描述
Flash, 64MX32, 100ns, PBGA107, BGA-107

W764M32V-100SBC 技术参数

生命周期:Active包装说明:BGA, BGA107,9X12,40
Reach Compliance Code:unknown风险等级:5.74
最长访问时间:100 ns其他特性:512,256 SECTOR OF 64K WORD ARE ALSO AVAILABLE
通用闪存接口:YES数据轮询:YES
数据保留时间-最小值:20JESD-30 代码:R-PBGA-B107
长度:17.1 mm内存密度:2147483648 bit
内存集成电路类型:FLASH内存宽度:32
功能数量:1端子数量:107
字数:67108864 words字数代码:64000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64MX32
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA107,9X12,40封装形状:RECTANGULAR
封装形式:GRID ARRAY并行/串行:PARALLEL
编程电压:3 V就绪/忙碌:YES
座面最大高度:3.11 mm最大待机电流:0.00002 A
最大压摆率:0.32 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
切换位:YES类型:NOR TYPE
宽度:14.1 mm写保护:HARDWARE/SOFTWARE
Base Number Matches:1

W764M32V-100SBC 数据手册

 浏览型号W764M32V-100SBC的Datasheet PDF文件第2页浏览型号W764M32V-100SBC的Datasheet PDF文件第3页浏览型号W764M32V-100SBC的Datasheet PDF文件第4页浏览型号W764M32V-100SBC的Datasheet PDF文件第5页浏览型号W764M32V-100SBC的Datasheet PDF文件第6页浏览型号W764M32V-100SBC的Datasheet PDF文件第7页 
W764M32V-XSBX  
Not Recommended for New Designs — Replaced by W764M32V1-XBX  
64Mx32 NOR Flash Multi-Chip Package 3.0V Page Mode Flash Memory  
 Hardware features  
FEATURES  
• Advanced Sector Protection  
 Single power supply operation  
• 3 volt read, erase, and program operations  
 I/O Control  
• WP#/ACC input accelerates programming time (when  
high voltage is applied) for greater throughput during  
system production. Protects rst or last sector regardless  
of sector protection settings  
• All input levels (address, control, and DQ input levels)  
and outputs are determined by voltage on VIO input. VIO  
range is 1.65 to VCC  
• Hardware reset input (RESET#) resets device  
• Ready/Busy# output (RY/BY#) detects program or erase  
cycle completion  
 Secured Silicon Sector region  
• 128-word/256-byte sector for permanent, secure  
identication through an 8-word/16-byte random  
Electronic Serial Number, accessible through a command  
sequence  
* This product is subject to change without notice.  
• May be programmed and locked at the factory or by the  
customer  
GENERAL DESCRIPTION  
The W764MB2V-XSBX device is a 3.0V single power flash  
memory. The device utilizes four organized as 33,554,432 words  
or 67, 108,864 bytes. The device has a 32-bit wide data bus, can  
be programmed either in the host system or in standard EPROM  
programmers.  
 Flexible sector architecture  
• Five hundred twelve 64 Kword (128 Kbyte) sectors  
• Two hundred fty-six 64 Kword (128 Kbyte) sectors  
• One hundred twenty-eight 64 Kword (128 Kbyte) sectors  
 Compatibility with JEDEC standard  
Each device requires a single 3.0 volt power supply for both  
read and write functions. In addition to a VCC input, a high-  
voltage accelerated program (WP# / ACC) input provides shorter  
programming times through increased current. This feature is  
intended to facilitate factory throughput during system production,  
but may also be used in the eld if desired.  
• Provides software compatibility for single-power supply  
ash, and superior inadvertent write protection  
 100,000 erase cycles per sector typical  
 20-year data retention typical  
The devices are entirely command set compatible with the JEDEC  
single power-supply Flash standard. Commands are written to  
the device using standard microprocessor write timing. Write  
cycles also internally latch addresses and data needed for the  
programming and erase operations.  
PERFORMANCE CHARACTERISTICS  
 High Performance  
• 100, 120 ns  
• 8-word/16-byte page read buffer  
• 25 ns page read times  
The sector erase architecture allows memory sectors to be erased  
and reprogrammed without affecting the data contents of other  
sectors. The device is fully erased when shipped from the factory.  
• 16-word/32-byte write buffer reduces overall  
programming time for multiple-word updates  
Device programming and erasure are initiated through command  
sequences. Once a program or erase operation has begun, the  
host system need only poll the DQ7 (Data# Polling) or DQ6  
(toggle) status bits or monitor the Ready / Busy# (RY / BY#)  
output to determine whether the operation is complete. To facilitate  
programming, an Unlock Bypass mode reduces command  
sequence over head by requiring only two write cycles to program  
data instead of four.  
 Package option  
• 107 BGA, 14mm x 17mm  
• 1.0mm pitch  
 Software features  
• Program Suspend and Resume: read other sectors  
before programming operation is completed  
The I/O (VIO) control allows the host system to set the voltage levels  
that the device generates and tolerates on all input levels (address,  
chip control, and DQ input levels) to the same voltage level that  
is asserted on the VIO pin. This allows the device to operate in a  
1.8 V or 3 V system environment as required.  
• Erase Suspend and Resume: read/program other sectors  
before an erase operation is completed  
• Data# polling and toggle bits provide status  
• Unlock Bypass Program command reduces overall  
multiple-word programming time  
Hardware data protection measures include a low VCC detector  
that automatically inhibits write operations during power transitions.  
Persistent Sector Protection provides in-system, comand-enabled  
protection of any combination of sectors using a single power  
• CFI (Common Flash Interface) compliant: allows host  
system to identify and accommodate multiple ash  
devices  
Microsemi Corporation reserves the right to change products or specications without notice.  
June 2012 © 2012 Microsemi Corporation. All rights reserved.  
Rev. 10  
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com  
Not Recommended for New Designs — Replaced by W764M32V1-XBX  

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