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W39L040AP90Z PDF预览

W39L040AP90Z

更新时间: 2024-11-24 03:17:51
品牌 Logo 应用领域
华邦 - WINBOND 闪存存储内存集成电路
页数 文件大小 规格书
26页 299K
描述
512K 】 8 CMOS FLASH MEMORY

W39L040AP90Z 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:QFJ包装说明:LEAD FREE, PLASTIC, LCC-32
针数:32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.84Is Samacsys:N
最长访问时间:90 ns启动块:BOTTOM/TOP
命令用户界面:YES数据轮询:YES
耐久性:10000 Write/Erase CyclesJESD-30 代码:R-PQCC-J32
JESD-609代码:e3长度:13.97 mm
内存密度:4194304 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
部门数/规模:8端子数量:32
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER页面大小:4K words
并行/串行:PARALLEL峰值回流温度(摄氏度):245
电源:3/3.3 V编程电压:3 V
认证状态:Not Qualified座面最大高度:3.56 mm
部门规模:64K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.03 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40切换位:YES
类型:NOR TYPE宽度:11.43 mm
Base Number Matches:1

W39L040AP90Z 数据手册

 浏览型号W39L040AP90Z的Datasheet PDF文件第2页浏览型号W39L040AP90Z的Datasheet PDF文件第3页浏览型号W39L040AP90Z的Datasheet PDF文件第4页浏览型号W39L040AP90Z的Datasheet PDF文件第5页浏览型号W39L040AP90Z的Datasheet PDF文件第6页浏览型号W39L040AP90Z的Datasheet PDF文件第7页 
W39L040A Data Sheet  
512K × 8 CMOS FLASH MEMORY  
Table of Contents-  
1.  
2.  
3.  
4.  
5.  
6.  
GENERAL DESCRIPTION ......................................................................................................... 3  
FEATURES................................................................................................................................. 3  
PIN CONFIGURATIONS ............................................................................................................ 4  
BLOCK DIAGRAM ...................................................................................................................... 4  
PIN DESCRIPTION..................................................................................................................... 4  
FUNCTIONAL DESCRIPTION ................................................................................................... 5  
6.1  
Device Bus Operation..................................................................................................... 5  
6.1.1 Read Mode.......................................................................................................................5  
6.1.2 Write Mode.......................................................................................................................5  
6.1.3 Standby Mode ..................................................................................................................5  
6.1.4 Output Disable Mode........................................................................................................5  
6.1.5 Auto-select Mode..............................................................................................................5  
6.2  
6.3  
Data Protection............................................................................................................... 6  
6.2.1 Low VDD Inhibit................................................................................................................6  
6.2.2 Write Pulse "Glitch" Protection .........................................................................................6  
6.2.3 Logical Inhibit ...................................................................................................................6  
6.2.4 Power-up Write and Read Inhibit......................................................................................6  
Command Definitions ..................................................................................................... 6  
6.3.1 Read Command ...............................................................................................................6  
6.3.2 Auto-select Command......................................................................................................7  
6.3.3 Byte Program Command..................................................................................................7  
6.3.4 Chip Erase Command ......................................................................................................7  
6.3.5 Sector Erase Command ...................................................................................................8  
6.4  
6.5  
Write Operation Status ................................................................................................... 8  
6.4.1 DQ7: #Data Polling...........................................................................................................8  
6.4.2 DQ6: Toggle Bit................................................................................................................9  
Table of Operating Modes .............................................................................................. 9  
6.5.1 Device Bus Operations.....................................................................................................9  
6.5.2 Auto-select Codes (High Voltage Method) .......................................................................9  
6.5.3 Sector Address Table.....................................................................................................10  
6.5.4 Command Definitions .....................................................................................................10  
6.6  
6.7  
Embedded Programming Algorithm ............................................................................. 11  
Embedded Erase Algorithm.......................................................................................... 12  
Publication Release Date:April 14, 2005  
- 1 -  
Revision A3  

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