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W39F010P-90 PDF预览

W39F010P-90

更新时间: 2024-11-05 19:20:15
品牌 Logo 应用领域
华邦 - WINBOND 内存集成电路
页数 文件大小 规格书
26页 327K
描述
Flash, 128KX8, 90ns, PQCC32, PLASTIC, LCC-32

W39F010P-90 技术参数

生命周期:Obsolete零件包装代码:QFJ
包装说明:PLASTIC, LCC-32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.79
最长访问时间:90 ns启动块:BOTTOM/TOP
命令用户界面:YES数据轮询:YES
耐久性:1000 Write/Erase CyclesJESD-30 代码:R-PQCC-J32
长度:13.97 mm内存密度:1048576 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:32
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX8封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC32,.5X.6
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL电源:5 V
编程电压:5 V认证状态:Not Qualified
座面最大高度:3.56 mm部门规模:4K
最大待机电流:0.00005 A子类别:Flash Memories
最大压摆率:0.03 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
切换位:YES类型:NOR TYPE
宽度:11.43 mmBase Number Matches:1

W39F010P-90 数据手册

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W39F010  
´ 8 CMOS FLASH MEMORY  
128K  
1. GENERAL DESCRIPTION  
The W39F010 is a 1Mbit, 5-volt only CMOS flash memory organized as 128K ´ 8 bits. For flexible erase  
capability, the 1Mbits of data are divided into 32 small even pages with 4 Kbytes. The byte-wide (´ 8)  
data appears on DQ7 - DQ0. The device can be programmed and erased in-system with a standard  
5V power supply. A 12-volt VPP is not required. The unique cell architecture of the W39F010 results in  
fast program/erase operations with extremely low current consumption (compared to other comparable  
5-volt flash memory products). The device can also be programmed and erased by using standard  
EPROM programmers.  
2. FEATURES  
· Single 5-volt operations  
- 5-volt Read  
· Flexible 4K-page size can be used as  
Parameter Blocks  
· Typical program/erase cycles:  
- 1K/10K  
- 5-volt Erase  
- 5-volt Program  
· Twenty-year data retention  
· Fast Program operation:  
- Byte-by-Byte programming: 50 mS (max.)  
· Fast Erase operation:  
· Low power consumption  
- Active current: 15 mA (typ.)  
- Standby current: 15 mA (typ.)  
- Chip Erase cycle time: 100 mS (max.)  
- Page Erase cycle time: 25 mS (max.)  
· Read access time: 70/90 nS  
· 32 even pages with 4K bytes  
· Any individual page can be erased  
· Hardware protection:  
· End of program detection  
- Software method: Toggle bit/Data polling  
· TTL compatible I/O  
· JEDEC standard byte-wide pinouts  
· Available packages: 32-pin 600 mil DIP,  
32-pin PLCC, 32- pin STSOP (8 x 14 mm) and  
32- pin TSOP  
- Optional 16K byte Top/Bottom Boot Block  
with lockout protection  
Publication Release Date: June 17, 2002  
- 1 -  
Revision A2  

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