W320-03
200 MHz Spread Spectrum Clock Synthesizer/Driver
with Differential CPU Outputs
Benefits
Features
• Compliant with Intel® CK-Titan Clock Synthe-
sizer/Driver Specifications
• Supports next-generation Pentium® processors using
differential clock drivers
• Multiple output clocks at different frequencies
• Three pairs of differential CPU outputs, up to 200 MHz
• Ten synchronous PCI clocks, three free-running
• Six 3V66 clocks
• Motherboard clock generator
• Support Multiple CPUs and a chipset
• Support for PCI slots and chipset
• Supports AGP, DRCG reference and Hub Link
• Supports USB host controller and graphic controller
• Supports ISA slots and I/O chip
• Two 48 MHz clocks
• One reference clock at 14.318 MHz
• One VCH clock
• Enables reduction of electromagnetic interference
(EMI) and overall system cost
• Spread Spectrum clocking (down spread)
• Enables ACPI-compliant designs
• Power-down features (PCI_STOP#, CPU_STOP#
PWR_DWN#)
• Supports up to four CPU clock frequencies
• Enables ATE and “bed of nails” testing
• Widely available, standard package enables lower cost
• Three Select inputs (Mode select & IC Frequency
Select)
• OE and Test Mode support
• 56-pin SSOP package and 56-pin TSSOP package
Logic Block Diagram
Pin Configurations
SSOP & TSSOP
Top View
VDD_REF
REF
VDD_REF
XTAL_IN
XTAL_OUT
GND_REF
PCI_F0
1
2
3
4
5
6
56
55
54
53
52
51
50
X1
X2
XTAL
OSC
PWR
REF
S1
PLL Ref Freq
S0
CPU_STOP#
Divider
CPU0
PLL 1
Network
PCI_F1
CPU#0
VDD_CPU
CPU1
VDD_CPU
CPU0:2
Stop
Clock
Control
PWR
PCI_F2
7
Gate
S0:2
PWR_GD#
VDD_PCI
GND_PCI
PCI0
49
48
47
46
8
CPU#0:2
CPU#1
9
CPU_STOP#
GND_CPU
VDD_CPU
10
11
VDD_PCI
PCI_F0:2
PCI1
PWR
PCI2
CPU2
45
44
43
42
41
12
13
Stop
Clock
Control
PCI3
PCI0:6
CPU#2
MULT0
14
15
16
17
18
19
20
21
22
23
VDD_PCI
PCI_STOP#
PWR_DWN#
GND_PCI
PCI4
IREF
/2
VDD_3V66
3V66_0
GND_IREF
S2
PWR
40
39
38
PCI5
PCI6
3V66_2:4/
66BUFF0:2
USB
PWR
VDD_3V66
DOT
3V66_5/ 66IN
GND_3V66
VDD_ 48 MHz
37
36
35
34
66BUFF0/3V66_2
66BUFF1/3V66_3
GND_ 48 MHz
3V66_1/VCH
PCI_STOP#
3V66_0
VDD_48MHz
USB (48MHz)
PLL 2
PWR
66BUFF2/3V66_4
66IN/3V66_5
33
32
31
30
29
24
25
DOT (48MHz)
PWR_DWN#
VDD_CORE
GND_CORE
VDD_3V66
GND_3V66
VCH_CLK/ 3V66_1
26
27
28
SCLK
PWR_GD#
SDATA
SDATA
SCLK
SMBus
Logic
Rev 1.0, November 25, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Page 1 of 16
www.SpectraLinear.com
Tel:(408) 855-0555 Fax:(408) 855-0550