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W29EE011-15B PDF预览

W29EE011-15B

更新时间: 2024-11-24 20:29:23
品牌 Logo 应用领域
华邦 - WINBOND 光电二极管内存集成电路
页数 文件大小 规格书
21页 289K
描述
Flash, 128KX8, 150ns, PDIP32, 0.600 INCH, PLASTIC, DIP-32

W29EE011-15B 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP32,.6针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.72
Is Samacsys:N最长访问时间:150 ns
其他特性:HARDWARE AND SOFTWARE DATA PROTECTION; 10-YEARS DATA RETENTION; 10K PROGRAM/ERASE CYCLE命令用户界面:NO
数据轮询:YES数据保留时间-最小值:10
耐久性:10000 Write/Erase CyclesJESD-30 代码:R-PDIP-T32
长度:41.91 mm内存密度:1048576 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:1K
端子数量:32字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:128KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP32,.6
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL电源:5 V
编程电压:5 V认证状态:Not Qualified
座面最大高度:5.33 mm部门规模:128
最大待机电流:0.0001 A子类别:Flash Memories
最大压摆率:0.05 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
切换位:YES类型:NOR TYPE
宽度:15.24 mm最长写入周期时间 (tWC):10 ms
Base Number Matches:1

W29EE011-15B 数据手册

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W29EE011  
´ 8 CMOS FLASH MEMORY  
128K  
GENERAL DESCRIPTION  
The W29EE011 is a 1-megabit, 5-volt only CMOS flash memory organized as 128K ´ 8 bits. The  
device can be programmed and erased in-system with a standard 5V power supply. A 12-volt VPP is  
not required. The unique cell architecture of the W29EE011 results in fast program/erase operations  
with extremely low current consumption (compared to other comparable 5-volt flash memory products).  
The device can also be programmed and erased using standard EPROM programmers.  
FEATURES  
· Single 5-volt program and erase operations  
· Fast page-write operations  
· Low power consumption  
- Active current: 25 mA (typ.)  
- Standby current: 20 mA (typ.)  
- 128 bytes per page  
- Page program cycle: 10 mS (max.)  
- Effective byte-program cycle time: 39 mS  
- Optional software-protected data write  
· Fast chip-erase operation: 50 mS  
· Read access time: 90/150 nS  
· Automatic program timing with internal VPP  
generation  
· End of program detection  
- Toggle bit  
- Data polling  
· Latched address and data  
· TTL compatible I/O  
· JEDEC standard byte-wide pinouts  
· Page program/erase cycles: 1K/10K  
· Ten-year data retention  
· Software and hardware data protection  
· Available packages: 32-pin 600 mil DIP, TSOP  
(8 x 20 mm), STSOP (8 x 14 mm), and PLCC  
Publication Release Date: February 19, 2002  
- 1 -  
Revision A15  

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