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W27E257-10 PDF预览

W27E257-10

更新时间: 2024-09-18 22:36:39
品牌 Logo 应用领域
华邦 - WINBOND 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 227K
描述
32K X 8 ELECTRICALLY ERASABLE EPROM

W27E257-10 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.600 INCH, PLASTIC, DIP-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.88Is Samacsys:N
最长访问时间:100 ns命令用户界面:NO
数据轮询:NOJESD-30 代码:R-PDIP-T28
JESD-609代码:e0长度:37.08 mm
内存密度:262144 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP28,.6
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V编程电压:5 V
认证状态:Not Qualified座面最大高度:5.33 mm
最大待机电流:0.0001 A子类别:EEPROMs
最大压摆率:0.03 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
切换位:NO宽度:15.24 mm
Base Number Matches:1

W27E257-10 数据手册

 浏览型号W27E257-10的Datasheet PDF文件第2页浏览型号W27E257-10的Datasheet PDF文件第3页浏览型号W27E257-10的Datasheet PDF文件第4页浏览型号W27E257-10的Datasheet PDF文件第5页浏览型号W27E257-10的Datasheet PDF文件第6页浏览型号W27E257-10的Datasheet PDF文件第7页 
W27E257  
32K ´ 8 ELECTRICALLY ERASABLE EPROM  
GENERAL DESCRIPTION  
The W27E257 is a high-speed, low-power Electrically Erasable and Programmable Read Only  
Memory organized as 32768 ´ 8 bits that operates on a single 5 volt power supply. The W27E257  
provides an electrical chip erase function. This part was the same EPROM Writer's utilities as the  
W27E256.  
FEATURES  
· High speed access time:  
100/120/150 nS (max.)  
· +14V erase/+12V programming voltage  
· Fully static operation  
· Read operating current: 15 mA (typ.)  
· All inputs and outputs directly TTL/CMOS  
compatible  
· Erase/Programming operating current  
1 mA (typ.)  
· Three-state outputs  
· Available packages: 28-pin 600 mil DIP and  
32-pin PLCC  
· Standby current: 5 mA (typ.)  
· Single 5V power supply  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
Q0  
V
V
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
CC  
.
PP  
CE  
OUTPUT  
CONTROL  
DECODER  
.
2
A14  
A13  
A8  
A12  
A7  
BUFFER  
Q7  
OE  
3
4
A6  
5
A9  
A5  
A0  
.
6
A11  
A4  
28-pin  
DIP  
7
A3  
OE  
CORE  
ARRAY  
8
A10  
A2  
.
9
A1  
CE  
Q7  
A14  
10  
11  
12  
13  
14  
A0  
Q6  
Q5  
Q4  
Q3  
V
CC  
Q0  
Q1  
Q2  
GND  
GND  
V
PP  
PIN DESCRIPTION  
A
1
2
V
P
P
V
C
C
A
1
4
A
1
3
A
7
N
C
SYMBOL  
DESCRIPTION  
3
2
3
1
4
3
2
1
3
0
Address Inputs  
Data Inputs/Outputs  
A0- A14  
Q0- Q7  
CE  
29  
28  
27  
26  
25  
24  
23  
A8  
A9  
A11  
NC  
A6  
5
A5  
A4  
A3  
A2  
A1  
A0  
NC  
Q0  
6
7
8
9
10  
11  
12  
13  
32-pin  
PLCC  
OE  
A10  
Chip Enable  
CE  
Q7  
Q6  
Output Enable  
OE  
VPP  
VCC  
GND  
NC  
22  
21  
1
8
1
9
2
0
1
7
1
4
1
5
1
6
Program/Erase Supply Voltage  
Power Supply  
Q
2
Q
1
G
N
D
Q
3
Q
4
Q
5
N
C
Ground  
No Connection  
Publication Release Date: January 1997  
Revision A3  
- 1 -  

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