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W27E040T-90 PDF预览

W27E040T-90

更新时间: 2024-11-21 22:11:15
品牌 Logo 应用领域
华邦 - WINBOND 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
15页 175K
描述
512K X 8 ELECTRICALLY ERASABLE EPROM

W27E040T-90 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP1包装说明:TSOP1, TSSOP32,.8,20
针数:32Reach Compliance Code:unknown
ECCN代码:3A991.B.1.B.1HTS代码:8542.32.00.51
风险等级:5.89Is Samacsys:N
最长访问时间:90 ns命令用户界面:NO
数据轮询:NOJESD-30 代码:R-PDSO-G32
JESD-609代码:e0长度:18.4 mm
内存密度:4194304 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:32字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装等效代码:TSSOP32,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:5 V编程电压:12 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.0001 A子类别:EEPROMs
最大压摆率:0.03 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
切换位:NO宽度:8 mm
Base Number Matches:1

W27E040T-90 数据手册

 浏览型号W27E040T-90的Datasheet PDF文件第2页浏览型号W27E040T-90的Datasheet PDF文件第3页浏览型号W27E040T-90的Datasheet PDF文件第4页浏览型号W27E040T-90的Datasheet PDF文件第5页浏览型号W27E040T-90的Datasheet PDF文件第6页浏览型号W27E040T-90的Datasheet PDF文件第7页 
W27E040  
512K ´ 8 ELECTRICALLY ERASABLE EPROM  
GENERAL DESCRIPTION  
The W27E040 is a high speed, low power Electrically Erasable and Programmable Read Only  
Memory organized as 524288 ´ 8 bits that operates on a single 5 volt power supply. The W27E040  
provides an electrical chip erase function.  
FEATURES  
· High speed access time:  
90/120 nS (max.)  
· +14V erase/+12V programming voltage  
· Fully static operation  
· Read operating current: 15 mA (typ.)  
· Erase/Programming operating current  
15 mA (typ.)  
· All inputs and outputs directly TTL/CMOS  
compatible  
· Three-state outputs  
· Available packages: 32-pin 600 mil DIP, 450  
mil SOP, PLCC and TSOP  
· Standby current: 5 mA (typ.)  
· Single 5V power supply  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
V PP  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
1
VCC  
A18  
A16  
A15  
A12  
2
Q0  
3
A17  
A14  
A13  
A8  
.
.
CE  
OUTPUT  
4
CONTROL  
DECODER  
BUFFER  
5
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
Q7  
OE  
6
7
A9  
32-pin  
DIP  
A11  
8
9
OE  
A10  
10  
11  
12  
13  
A0  
.
CE  
Q7  
CORE  
ARRAY  
Q6  
Q5  
Q4  
Q3  
Q0  
Q1  
14  
15  
16  
19  
18  
17  
.
Q2  
A18  
GND  
A
1
8
V
CC  
A
1
2
V
C
C
A
1
7
A
1
5
V
P
P
A
1
6
GND  
4
3
1
2
32 31 30  
V
PP  
5
6
29  
28  
27  
26  
25  
24  
23  
22  
21  
A14  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
Q0  
A13  
A8  
7
32-pin  
PLCC  
8
A9  
9
A11  
10  
11  
12  
13  
PIN DESCRIPTION  
OE  
A10  
CE  
Q7  
SYMBOL  
DESCRIPTION  
14 15 16 17 18 19 20  
Address Inputs  
Data Inputs/Outputs  
A0- A18  
Q0- Q7  
CE  
G
N
D
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
1
2
3
A11  
32  
31  
30  
29  
28  
27  
26  
25  
OE  
A10  
A9  
A8  
A13  
CE  
Q7  
Q6  
Q5  
Chip Enable  
4
5
A14  
A17  
A18  
6
7
Output Enable  
OE  
VPP  
VCC  
GND  
NC  
Q4  
Q3  
32-pin  
TSOP  
VCC  
VPP  
8
Program/Erase Supply Voltage  
Power Supply  
GND  
Q2  
9
24  
23  
22  
21  
20  
19  
10  
A16  
A15  
A12  
11  
12  
13  
14  
15  
16  
Q1  
Q0  
A0  
A1  
A2  
A3  
A7  
A6  
A5  
A4  
Ground  
18  
17  
No Connection  
Publication Release Date: May 1997  
Revision A1  
- 1 -  

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