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W27C520 PDF预览

W27C520

更新时间: 2024-09-18 22:41:27
品牌 Logo 应用领域
华邦 - WINBOND 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
16页 237K
描述
64K X 8 ELECTRICALLY ERASABLE EPROM

W27C520 数据手册

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Preliminary W27C520  
´ 8 ELECTRICALLY ERASABLE EPROM  
64K  
GENERAL DESCRIPTION  
The W27C520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory  
organized as 65,536 ´ 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8  
data lines. To cooperate with the MCU, this device could save the external TTL component, also cost  
and space. It requires only one supply in the range of 3.0V to 3.6V or 4.5V to 5.5V in normal read  
mode. The W27C520 provides an electrical chip erase function. It will be a great convenient when you  
need to change/update the contents in the device.  
FEATURES  
· High speed access time: 70/90 nS (max.)  
· Read operating current: 8/20 mA (max.)  
· Erase/Programming operating current  
· High Reliability CMOS Technology  
- 2K V ESD Protection  
- 200 mA Latchup Immunity  
· Fully static operation  
30 mA (max.)  
· All inputs and outputs directly LVTTL/CMOS  
compatible  
· Three-state outputs  
· Standby current: 20/100 mA (max.)  
· Unregulated battery power supply range,  
3.0V to 3.6V and 4.5V to 5.5V  
· Available packages: 20-pin TSSOP and 20-pin  
SOP  
· +13V erase and programming voltage  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
1
2
3
4
5
6
7
8
9
10  
A10  
A12  
A14  
ALE  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A8  
ALE  
OUTPUT  
BUFFER  
CONTROL  
AD1  
AD3  
AD5  
AD7  
GND  
OE / V  
PP  
L
V
DD  
TSSOP  
Top View  
A
T
C
H
E
S
AD7 - AD0  
OE/VPP  
A15  
MEMORY  
ARRAY  
DECODER  
AD6  
AD4  
AD2  
AD0  
A13  
A15 - A8  
A11  
A9  
V
DD  
GND  
1
VDD  
ALE  
A14  
A12  
A10  
A8  
OE/VPP  
A15  
20  
2
3
19  
18  
17  
PIN DESCRIPTION  
A13  
A11  
A9  
SYMBOL  
DESCRIPTION  
4
Address/Data Inputs/Outputs  
Address Inputs  
AD0- AD7  
A8- A15  
ALE  
5
SOP  
Top View  
16  
15  
14  
13  
12  
11  
6
AD0  
7
AD1  
AD2  
AD4  
AD6  
GND  
Address Latch Enable  
8
AD3  
AD5  
AD7  
Output Enable, Program/Erase  
Supply Voltage  
OE/VPP  
9
10  
VDD  
Power Supply  
Ground  
GND  
Publication Release Date: October 2000  
Revision A1  
- 1 -  

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