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W24258/LL

更新时间: 2024-02-07 09:22:14
品牌 Logo 应用领域
其他 - ETC 电池静态存储器
页数 文件大小 规格书
10页 185K
描述
SRAM

W24258/LL 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIE,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.83
最长访问时间:100 nsJESD-30 代码:R-XUUC-N28
内存密度:262144 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP并行/串行:PARALLEL
认证状态:Not Qualified最大供电电压 (Vsup):3.3 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子位置:UPPERBase Number Matches:1

W24258/LL 数据手册

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W24258/LL  
32K ´ 8 CMOS STATIC RAM  
GENERAL DESCRIPTION  
The W24258/LL is a normal speed, very low power CMOS static RAM organized as 32768 ´ 8 bits  
that operates on a single 5-volt power supply. This device is manufactured using Winbond's high  
performance CMOS technology.  
FEATURES  
· Low power consumption:  
- Active: 350 mW (max.)  
- Standby: 25 mW (max.)  
· Three-state outputs  
· Battery back-up operation capability  
· Data retention voltage: 2V (min.)  
· Access time: 55/70 nS (max.)  
· Single 5V power supply  
· Fully static operation  
· Packaged in 28-pin 600 mil DIP, 330 mil SOP  
and standard type one TSOP (8 mm ´ 13.4  
mm)  
· All inputs and outputs directly TTL compatible  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
CLK GEN.  
PRECHARGE CKT.  
A12  
A14  
A2  
R
O
W
CORE CELL ARRAY  
512 ROWS  
A3  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A14  
A12  
A7  
1
V
DD  
D
E
C
O
D
E
R
A4  
2
WE  
A13  
A8  
64 X 8 COLUMNS  
A5  
3
A6  
A5  
A6  
4
5
A9  
A7  
A4  
A11  
OE  
6
A13  
I/O1  
I/O8  
28-pin  
DIP  
A3  
7
I/O CKT.  
COLUMN DECODER  
DATA  
CNTRL.  
A2  
8
A10  
CS  
A1  
9
CLK  
GEN.  
A0  
10  
11  
12  
13  
14  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
I/O1  
I/O2  
I/O3  
A8  
A10 A1 A0  
A9  
A11  
WE  
CS  
OE  
V
SS  
PIN DESCRIPTION  
A10  
CS  
I/O8  
I/O7  
1
OE  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
SYMBOL  
DESCRIPTION  
2
A11  
A9  
3
4
A8  
Address Inputs  
A0- A14  
A13  
5
I/O6  
I/O5  
I/O4  
6
WE  
28-pin  
TSOP  
V
7
DD  
Data Inputs/Outputs  
Chip Select Input  
Write Enable Input  
Output Enable Input  
Power Supply  
I/O1- I/O8  
8
A14  
A12  
A7  
V
SS  
9
I/O3  
I/O2  
I/O1  
A0  
A1  
A2  
10  
11  
12  
13  
14  
CS  
A6  
A5  
A4  
WE  
A3  
OE  
VDD  
VSS  
Ground  
Publication Release Date: November 1998  
Revision A5  
- 1 -  

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