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W24257-70L PDF预览

W24257-70L

更新时间: 2024-11-11 20:11:23
品牌 Logo 应用领域
华邦 - WINBOND 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 140K
描述
Standard SRAM, 32KX8, 70ns, CMOS, PDIP28, 0.600 INCH, PLASTIC, DIP-28

W24257-70L 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.81
最长访问时间:70 nsJESD-30 代码:R-PDIP-T28
JESD-609代码:e3长度:37.08 mm
内存密度:262144 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端口数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
输出特性:3-STATE可输出:YES
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:5.33 mm最小待机电流:2 V
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:MATTE TIN端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:15.24 mmBase Number Matches:1

W24257-70L 数据手册

 浏览型号W24257-70L的Datasheet PDF文件第2页浏览型号W24257-70L的Datasheet PDF文件第3页浏览型号W24257-70L的Datasheet PDF文件第4页浏览型号W24257-70L的Datasheet PDF文件第5页浏览型号W24257-70L的Datasheet PDF文件第6页浏览型号W24257-70L的Datasheet PDF文件第7页 
W24257  
32K ´ 8 CMOS STATIC RAM  
GENERAL DESCRIPTION  
´
The W24257 is a slow speed, low power CMOS static RAM organized as 32768 8 bits that operates  
on a single 5-volt power supply. This device is manufactured using Winbond's high performance  
CMOS technology.  
FEATURES  
·
·
·
·
·
·
Low power consumption:  
All inputs and outputs directly TTL compatible  
Three-state outputs  
-
Active: 325 mW (max.)  
Battery back-up operation capability  
Data retention voltage: 2V (min.)  
-
m
Standby: 75 W (max.) (LL-version)  
m
150 W (max.) (L-version)  
Packaged in 28-pin 600 mil DIP, 330 mil SOP,  
standard type one TSOP (8 mm x 13.4 mm )  
·
·
·
Access time: 70 nS (max.)  
+
Single 5V power supply  
Fully static operation  
PIN CONFIGURATION  
BLOCK DIAGRAM  
V
DD  
VSS  
1
2
3
28  
27  
26  
A14  
A12  
A7  
V
DD  
A0  
.
.
DECODER  
WE  
A13  
CORE  
ARRAY  
A14  
4
5
25  
24  
A8  
A9  
A6  
A5  
CS  
OE  
WE  
I/O1  
.
CONTROL  
DATA I/O  
.
A11  
A4  
A3  
6
7
23  
22  
21  
I/O8  
OE  
A2  
8
A10  
A1  
A0  
9
20  
19  
CS  
PIN DESCRIPTION  
I/O8  
10  
11  
SYMBOL  
DESCRIPTION  
I/O1  
18  
17  
I/O7  
Address Inputs  
-
A0 A14  
Data Inputs/Outputs  
Chip Select Input  
Write Enable Input  
Output Enable Input  
Power Supply  
-
I/O1 I/O8  
I/O2  
I/O3  
12  
13  
14  
I/O6  
I/O5  
I/O4  
CS  
WE  
OE  
16  
15  
V
SS  
DD  
V
SS  
V
Ground  
Publication Release Date: November 1999  
Revision A12  
- 1 -  

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