Datasheet > W155

W155

更新时间： 2024-11-20 22:14:55

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
6页	89K
描述
Spread Spectrum Frequency Timing Generator

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W155 数据手册

W155

Spread Spectrum Frequency Timing Generator

Features

Table 1. Frequency Selection (14.318-MHz Reference)

• Generates a spread spectrum timing signal (SYSCLK)

and a non-spread signal (USBCLK)

• Requires a 14.318-MHz crystal for operation

• Supports MIPS microprocessor clock frequencies

• Reduces peak EMI by as much as 12 dB

• Integrated loop filter components

• Cycle-to-cycle jitter = 250 ps (max)

• Operates with a 3.3 or 5.0V power supply

• Spread output is selectable from 10 to 133 MHz

• TEST mode supports modulation off (High-Z) and spe-

cial test input reference frequency

• Guaranteed 45/55 duty cycle

• Packaged in a 16-pin, 300-mil-wide SOIC (Small Outline

Integrated Circuit)

SYSCLK

FS3

FS2

FS1

FS0

(Output Freq.)

133.3 MHz

120 MHz

100 MHz

74.77 MHz

70 MHz

66.6 MHz

60 MHz

50 MHz

40 MHz

33.33 MHz

30 MHz

Overview

The W155 incorporates the latest advances in PLL-based

spread spectrum frequency synthesizer technology. By fre-

quency modulating the SYSCLK output with a low-frequency

carrier, peak EMI can be greatly reduced in a system. Use of

this technique allows systems to pass increasingly difficult EMI

testing without resorting to costly shielding or redesign.

25 MHz

20 MHz

16.67 MHz

12 MHz

In a system that uses the W155, not only is EMI reduced in the

various clock lines, but also in all signals which are synchro-

nized to SYSCLK. Therefore, the benefits of using this tech-

nique increase with the number of address and data lines in

the system.

10 MHz

Table 2. Spread Percentage Selection

SS%

Spread Percentage

–1.25%

The W155 is specifically targeted toward MIPS microproces-

sor based systems where EMI is of particular concern. Each

device uses a single 14.318-MHz crystal to generate a select-

able spread spectrum output and an unmodulated 48-MHz

USB Output.

–3.75%

[1]

Pin Configuration

The spreading function can be disabled by taking the SSON#

pin high. Spread percentage can be selected with the SS%

input (see Table 2 below).

VDD

TEST

VDD

USBCLK/SS%*

GND

FS3*

VDD

FS2*

FS1*

GND

SYSCLK

GND

FS0*

SSON#^

Note:

1. Internal pull-up resistor present on inputs marked with ‘*’ and pull-down

resistor present on input marked with ‘^’.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

September 29, 1999, rev. **

12 3 4 5 6

中文翻译

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