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W152-3X

更新时间: 2024-11-04 23:41:23
品牌 Logo 应用领域
其他 - ETC 时钟驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 145K
描述
Eight Distributed-Output Clock Driver

W152-3X 数据手册

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W152  
Spread Aware™, Eight Output Zero Delay Buffer  
Output to Output Skew: Between Banks.....................215 ps  
Features  
Output to Output Skew: Within Banks  
• Spread Aware™—designed to work with SSFTG  
reference signals  
• Two banks of four outputs each  
• Configuration options to halve, double, or quadruple  
the reference frequency refer to Table 1 to determine  
the specific option which meets your multiplication  
needs  
(Refer to Figure 4)...................................................100 ps  
Total Timing Budget Impact:........................................555 ps  
Max. Phase Error Variation:.......................................±225 ps  
Tracking Skew:..........................................................±130 ps  
Table 1. Configuration Options  
• Outputs may be three-stated  
Device  
W152-1/11[1]  
W152-2/12[2]  
W152-2/12[2]  
W152-3  
Feedback Signal  
QA0:3 or QB0:3  
QA0:3  
QA0:3  
REFx1  
REFx1  
REFx2  
REFx2  
REFx4  
REFx2  
QB0:3  
REFx1  
REF/2  
REFx1  
REFx1  
REFx2  
REFx2  
• Available in 16-pin SOIC package  
• Extra strength output drive available (-11/-12 versions)  
• Contact factory for availability information on 16-pin  
TSSOP  
QB0:3  
Key Specifications  
QA0:3  
Operating Voltage: ............................................... 3.3V±10%  
Operating Range: ................... 15 MHz < fOUTQA < 140 MHz  
Cycle-to-Cycle Jitter: (Refer to Figure 3) .................... 225 ps  
W152-3  
QB0:3  
W152-4  
QA0:3 or QB0:3  
Notes:  
1. W152-11 has stronger output drive than the W152-1.  
2. W152-12 has stronger output drive than the W152-2.  
Cycle-to-Cycle Jitter: Frequency Range  
25 to140 MHz ......................................................... 125 ps  
Block Diagram  
Pin Configuration  
(present on the -3 and -4 only)  
FBIN  
REF  
÷2  
PLL  
REF  
QA0  
QA1  
VDD  
GND  
QB0  
QB1  
SEL1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
FBIN  
QA3  
QA2  
VDD  
GND  
QB3  
QB2  
SEL0  
MUX  
QA0  
QA1  
QA2  
SEL0  
SEL1  
QA3  
÷2  
QB0  
QB1  
QB2  
QB3  
(present on the -2, -12, and -3 only)  
Spread Aware is a trademark of Cypress Semiconductor Corporation.  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-07148 Rev. **  
Revised September 24, 2001  

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