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VSP2232YG/2KE6 PDF预览

VSP2232YG/2KE6

更新时间: 2024-09-23 20:52:39
品牌 Logo 应用领域
德州仪器 - TI 商用集成电路
页数 文件大小 规格书
22页 568K
描述
SPECIALTY CONSUMER CIRCUIT, PQFP48, PLASTIC, LQFP-48

VSP2232YG/2KE6 技术参数

是否无铅: 含铅生命周期:Obsolete
零件包装代码:QFP包装说明:LFQFP,
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.65
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQFP-G48
长度:7 mm功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH认证状态:Not Qualified
座面最大高度:1.6 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V表面贴装:YES
温度等级:OTHER端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:7 mmBase Number Matches:1

VSP2232YG/2KE6 数据手册

 浏览型号VSP2232YG/2KE6的Datasheet PDF文件第2页浏览型号VSP2232YG/2KE6的Datasheet PDF文件第3页浏览型号VSP2232YG/2KE6的Datasheet PDF文件第4页浏览型号VSP2232YG/2KE6的Datasheet PDF文件第5页浏览型号VSP2232YG/2KE6的Datasheet PDF文件第6页浏览型号VSP2232YG/2KE6的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃꢃ ꢄꢃ  
SLAS320 − MAY 2001  
ꢅꢅꢆ ꢁꢇ ꢈ ꢉꢊꢋ ꢂꢌ ꢍꢅꢎ ꢁꢁꢍ ꢌ  
ꢏꢍ ꢌ ꢆꢇ ꢈꢇ ꢐꢊꢋ ꢅꢊꢑ ꢎꢌ ꢊꢁ  
FEATURES  
DESCRIPTION  
D
CCD Signal Processing  
− Correlated Double Sampling (CDS)  
− Programmable Black Level Clamping  
The VSP2232 is a complete mixed-signal processing IC  
for digital cameras that provides signal conditioning and  
analog-to-digital conversion for the output of a CCD  
array. The primary CCD channel provides correlated  
double sampling (CDS) to extract the video information  
from the pixels, a −6-dB to 42-dB gain with digital control  
for varying illumination conditions, and black level  
clamping for an accurate black level reference.  
D
D
Programmable Gain Amplifier (PGA)  
− −6-dB to 42-dB Gain Ranging  
10-Bit Digital Data Output  
− Up to 36-MHz Conversion Rate  
− No Missing Codes  
D
D
76-dB Signal-to-Noise Ratio  
Input signal clamping and offset correction of the input  
CDS is also performed. The stable gain control is linear  
in dB. Additionally, the black level is quickly recovered  
after gain change.  
Portable Operation  
− Low Voltage: 2.7 V to 3.6 V  
− Low Power: 130 mW (typ) at 3.0 V  
− Standby Mode: 6 mW  
The VSP2232Y is pin-to-pin compatible with the  
VSP2262Y (12-bit 20 MHz) one-chip product.  
The VSP2232Y is available in a 48-pin LQFP package  
and operates from a single 3-V/3.3-V supply.  
VSP2232 block diagram  
CLPDM  
SHP SHD  
SLOAD SCLK SDATA  
Serial Interface  
RESET  
ADCCK DRV  
DD  
V
CC  
Input  
Clamp  
Timing Control  
B(0−11)  
Correlated  
Double  
Sampling (CDS)  
Programmable  
Gain Amplifier  
(PGA)  
12-Bit  
Digital  
Output  
Output  
Latch  
Analog-to-Digital  
Converter  
−6 to 42 dB  
Optical Black (OB)  
Level Clamping  
CCD  
Output  
Signal  
Preblanking  
PBLK  
Reference Voltage Generator  
COB  
CPLOB  
BYPP2 BYP BYPM REFN CM REFP  
DRVGND  
GNDA  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢐꢞ  
Copyright 2001, Texas Instruments Incorporated  
ꢚ ꢞ ꢛ ꢚꢓ ꢔꢨ ꢖꢕ ꢙ ꢡꢡ ꢟꢙ ꢗ ꢙ ꢘ ꢞ ꢚ ꢞ ꢗ ꢛ ꢣ  
1
www.ti.com  

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