Datasheet > VSC9180UV

VSC9180UV

更新时间： 2024-01-21 20:31:32

品牌	Logo	应用领域
美高森美 - MICROSEMI		/
页数	文件大小	规格书
28页	499K
描述
Telecom IC,

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VSC9180UV 技术参数

生命周期：	Transferred	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.82

VSC9180UV 数据手册

VSC9180

Data Sheet

Serial 2.5Gb/s Hitless Sonet/SDH Backplane Transceiver

FEATURES

• 16-Bit 155MHz/4-Bit 622MHz 2.5Gb/s Serial

• Deskews Incoming 2.5Gb/s Signals by ±75ns

• 16-Bit/4-Bit LVDS Parallel Bus with Both

LVPECL and CML Compatibility

• Single 2.5V Power Supply

• 2.2 Watts Power Dissipation (max)

• Ideal for low cost 2.5Gb/s Backplane Interconnect in

SONET/SDH ADM, TSI or Wavelength

Cross Connect Applications

Backplane Transceiver with Integrated CMU/CRU

• Serial Quad STS-12/STM-4 to 2.5Gb/s Capability

with Integrated STS-12 Input Retiming and Deskew

• Operation at 155MHz, 622MHz, 2.488GHz, 2.65GHz

• Redundant 2.5Gb/s Serial Outputs and Dual 2.5Gb/s

Serial Inputs with Hardware Driven Hitless Selection

• 2.5Gb/s Backplane Loss of Signal, Frame and

Alignment Alarms

• 195 BGA Package

General Description

The VSC9180 is a SONET/SDH backplane transceiver with support for working and protection hitless backplane

1+1 protection. It is designed to serialize four STS-12/STM-4 signals, or byte interleaved SONET/SDH/OTN data

from 4-bit 622MHz or 16-bit 155MHz parallel buses onto redundant 2.5Gb/s serial backplane outputs. It receives two

synchronous and serial STS-48/STM-16 signals or G.709 OTU1 signals, recovers the clock, deskews them and then

hitlessly selects between the two. Hitless selection criteria can be derived from BER monitoring or signal integrity

monitoring. The selected signal is deserialized to a 4-bit 622MHz bus, a 16-bit 155MHz bus or quad STS-12s operat-

ing at 622Mb/s.

VSC9180 Functional Block Diagram

FRALIGNRST

BER[B:A]

LOL[B:A]

RESET_b

RXINA+/-

SEF[B:A]

RXLOA

DMX

A1/A2

Align

Deinter-

leave

Dual

2.5GHz

CDR

RXDATA[15:0]+/-

RXCLK+/-

RXINB+/-

CLK311MODE

2:1

(same

)

CHSEL

EQUIPLOOP

FPOUT+/-

LINELOOP

TXOUTA+/-

INTRLV

[3:0]

[15:0]

TXDATA[15:0]+/-

STS-12/STM-4

MUX

Phase Alignment

STS-48/STM-16

Interleaver

TXLOA

2:1

[15:0]

TXOUTB+/-

MUX

16 bit 155MHz

4 bit 622MHz

Retiming FIFO

TXCLK+/-

TXCLK_SRC+/-

REFSEL

REFCLK+/-

CMU

BUSMODE

G52346, Revision 4.6

September 2, 2003

Tel: (800) VITESSE • FAX: (805) 987-5896 • E-mail: prodinfo@vitesse.com

Internet: www.vitesse.com

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