VSC7135

更新时间： 2024-09-18 03:55:11

品牌	Logo	应用领域
VITESSE		以太网
页数	文件大小	规格书
16页	125K
描述
1.25Gbits/sec Gigabit Ethernet Transceiver

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数据手册

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VSC7135 数据手册

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

1.25Gbits/sec

Gigabit Ethernet Transceiver

VSC7135

Features

• Gigabit Ethernet Transceiver @ 1.25Gb/s

• Low Power Operation - 700 mW

• Compliant to IEEE 802.3Z PMA

• Suitable for Both Coaxial or Optical Link

Applications

• TTL Interface Compatible to PMA-TBI

• Monolithic Clock Synthesis and Clock

Recovery - No External Components

• 64 Pin, 14mm or 10mm Standard PQFP

• Single +3.3V Supply

• 125MHz TTL Reference Clock

General Description

The VSC7135 is a 1.25Gb/s Ethernet Transceiver optimized for Gigabit Ethernet or 1000Base-X applica-

tions. It accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of REFCLK and serializes it

onto the TX PECL differential outputs at a baud rate which is ten times the REFCLK frequency. The VSC7135

also samples serial receive data on the RX PECL differential inputs, recovers the clock and data, deserializes it

onto the 10-bit receive data bus, outputs two recovered clocks at one-twentieth of the incoming baud rate and

detects “Comma” characters. The VSC7135 contains on-chip PLL circuitry for synthesis of the baud-rate trans-

mit clock, and extraction of the clock from the received serial stream. These circuits are fully monolithic and

require no external components.

VSC7135 Block Diagram

EWRAP

Q D

Serial to

Parallel

R0:9

RX+

RX-

Q D

Retimed

Data

Clock

Recovery

2:1

÷ 10

÷ 20

Recovered

Clock

RCLK

RCLKN

Comma

Detect

Frame

Logic

Resync

COM_DET

EN_CDET

TX+

TX-

Parallel

to Serial

D Q

T0:9

Serial Data

Synthesized

Clock

PLL Clock

Multiply

REFCLK

G52146-0, Rev. 4.0

5/28/98

VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

Page 1

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