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VSC7127RXQM PDF预览

VSC7127RXQM

更新时间： 2024-01-26 08:36:25
品牌 Logo 应用领域
VITESSE 光纤中继器
页数 文件大小 规格书
12页 177K
描述
Telecom IC

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VSC7127RXQM 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：QFP, QFP44,.5SQ,32针数：44
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.79JESD-30 代码：S-PQFP-G44
长度：10 mm功能数量：1
端子数量：44最高工作温度：95 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP44,.5SQ,32
封装形状：SQUARE封装形式：FLATPACK
电源：3.3 V认证状态：Not Qualified
座面最大高度：2.45 mm子类别：Other Telecom ICs
最大压摆率：0.26 mA标称供电电压：3.3 V
表面贴装：YES技术：GAAS
电信集成电路类型：TELECOM CIRCUIT温度等级：OTHER
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD宽度：10 mm
Base Number Matches：1

VSC7127RXQM 数据手册

 浏览型号VSC7127RXQM的Datasheet PDF文件第2页浏览型号VSC7127RXQM的Datasheet PDF文件第3页浏览型号VSC7127RXQM的Datasheet PDF文件第4页浏览型号VSC7127RXQM的Datasheet PDF文件第5页浏览型号VSC7127RXQM的Datasheet PDF文件第6页浏览型号VSC7127RXQM的Datasheet PDF文件第7页 
VITESSE  
SEMICONDUCTOR CORPORATION  
Data Sheet  
Family of Repeater/Retimer and Port  
Bypass Circuits for Fibre Channel  
VSC7127/VSC7129  
Features  
• ANSI X3T11 Fibre Channel Compliant  
•
Analog/Digital Signal Detect (SDU)  
• On-Chip Transmit Termination  
• 3.3V, 700mW Power Dissipation  
• 1.0625Gb/s Operation  
™
• Features the FibreTimer Configurable Clock  
Recovery Unit (CRU): Repeater, Retimer or  
Bypassed  
• Compatible with HDMP-0451 (VSC7127) or  
HDMP-0452 (VSC7129)  
• Six Port Bypass Circuits (PBC)  
• 44-Pin, 10mm PQFP Package  
General Description  
™
The VSC7127 and VSC7129 contain six cascaded Port Bypass Circuits (PBCs), the FibreTimer config-  
urable Repeater/Retimer (CRU) and a Signal Detect Unit (SDU). These parts are typically used in distributing  
Fibre Channel signals to an array of disk drives in an FC-AL loop as illustrated in Figure 1. The first  
VSC7127’s CRU is configured as a Repeater to attenuate jitter, the second VSC7127’s CRU is bypassed to  
reduce power and the third VSC7127’s CRU is configured as a retimer so that the output of the device is a jitter-  
compliance point.  
Each PBC is a multiplexer that is controlled by the corresponding SELx line which, if HIGH, selects the  
external input or, if LOW, selects the output of the previous PBC. For the VSC712xR, when MODE is LOW  
and SEL5 is HIGH, the CRU is a sophisticated repeater which has low latency, no peaking and attenuates jitter  
even at low frequencies. When MODE is HIGH and SEL5 is HIGH, the CRU is a retimer which eliminates jit-  
ter transfer but has increased latency due to an elasticity buffer which adds/drops Fibre Channel fill words in  
order to accomodate the difference between the baud rate of the incoming data and the local REFCLK. When  
SEL5 is LOW, the CRU is bypassed and powered down. The SDU monitors the analog levels of the IO+/- input  
and monitors the output of the CRU digitally to indicate whether valid data is present.  
™
The VSC7127/VSC7129 are similar to the VSC7124 which does not contain the FibreTimer cell or CMU.  
VSC7127/VSC7129 Block Diagram  
REFCLK  
CMU  
106.25MHz  
1
0
1
0
1
0
1
0
1
0
0.1uF  
PBC0  
PBC1  
PBC2  
PBC3  
PBC4  
SEL5  
1
0
PBC5  
CRU  
SDU  
MODE  
SIGDET  
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012  
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com  
Internet: www.vitesse.com  
G52298-0, Rev 4.3  
05/01/01  
Page 1  
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