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VPLD61J3EG5-16.384MHZ PDF预览

VPLD61J3EG5-16.384MHZ

更新时间： 2024-11-14 03:38:23
品牌 Logo 应用领域
CONNOR-WINFIELD /
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2页 210K
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Oscillator

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VPLD61J3EG5-16.384MHZ 数据手册

 浏览型号VPLD61J3EG5-16.384MHZ的Datasheet PDF文件第2页 
THE CONNOR-WINFIELD CORP.  
2111 COMPREHENSIVE DRIVE.  
AURORA, IL 60505.  
FAX (630) 851-5040.  
PHONE (630) 851-4722.  
WWW.CONWIN.COM  
P R O D UC T D ATA S H E E T  
CRYSTAL CONTROLLED OSCILLATORS  
CW  
0632  
VPLD61J3EG5  
155.52M  
3.3V SURFACE MOUNT VCXO OSCILLATOR  
ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
TABLE 1.0  
NOTE  
UNITS  
MINIMUM NOMINAL MAXIMUM  
UNITS  
°C  
VPLD61J3EG5  
Storage Temperature  
Supply Voltage  
-40  
-0.5  
-0.5  
-
-
-
85  
7.0  
7.0  
(Vcc)  
(Vc)  
Vdc  
Vdc  
Control Voltage  
DESCRIPTION  
OPERATING SPECIFICATIONS  
PARAMETER  
TABLE 2.0  
NOTE  
MINIMUM NOMINAL MAXIMUM  
UNITS  
MHz  
The Connor-Winfield  
Center Frequency  
(Fo)  
16.384  
-
200  
VPLD61J3EG5 is a 3.3V  
Voltage Controlled Crystal  
Oscillator (VCXO) with  
Differential LVPECLoutputs  
and Enable/Disable function.  
The VPLD61J3EG5 is  
designed for use with PLL  
systems in SONET/SDH  
systems requiring low jitter  
and tight frequency stability  
over the industrial  
Frequency Stability  
-25  
-
-
25  
ppm  
1
Operating Temperature Range  
Supply Voltage  
-40  
85  
°C  
(Vcc)  
(Icc)  
3.135  
3.3  
-
3.465  
Vdc  
Supply Current  
-
-
-
-
-
-
-
-
-
100  
mA  
Jitter (BW=10Hz to 20MHz)  
Jitter (BW=12kHz to 80MHz)  
SSB Phase Noise at 10Hz offset  
SSB Phase Noise at 100Hz offset  
SSB Phase Noise at 1KHz offset  
SSB Phase Noise at 10KHz offset  
SSB Phase Noise at 100KHz offset  
Oscillator startup time  
-
5
1
-
ps rms  
ps rms  
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
dBc/Hz  
ms  
-
-50  
-80  
-110  
-135  
-140  
-
-
-
-
-
10  
temperature range. No  
multiplication schemes are  
used in this oscillator design.  
INPUT CHARACTERISTICS  
PARAMETER  
TABLE 3.0  
NOTE  
MINIMUM NOMINAL MAXIMUM  
UNITS  
Vdc  
ppm  
%
Control Voltage Range  
Absolute Pull Range (APR)  
Monotonic Linearity  
(Vc)  
0.3  
+/-50  
-10  
-
1.65  
3.0  
-
-
2
-
10  
FEATURES  
Input Impedance  
50K  
-
Ohm  
KHz  
Vdc  
Vdc  
-
-
-
Modulation Bandwidth (3dB)  
Enable Input Voltage (Low)  
Disable Input Voltage (High)  
10  
-
1.68  
-
(Vil)  
-
3
3
SURFACE MOUNT PACKAGE  
3.3V OPERATION  
(Vih)  
2.275  
LVPECL OUTPUT CHARACTERISTICS  
TABLE 4.0  
PARAMETER  
MINIMUM NOMINAL MAXIMUM  
UNITS  
Ohms  
Vdc  
Vdc  
%
NOTE  
LOW JITTER <1pS RMS  
LOAD  
-
-
-
50  
-
4
Voltage  
(High)  
(Low)  
(Voh)  
(Vol)  
2.275  
FREQUENCY STABILITY: ±20ppm  
TEMPERATURE RANGE: -40 to 85°C  
DIFFERENTIAL LVPECLOUTPUTS  
ENABLE / DISABLE FUNCTION  
RoHS 5/6 COMPLIANT  
-
45  
-
-
1.68  
55  
Duty Cycle at 50% Level  
50  
-
Rise / Fall Time measured @ 20% to 80%  
1.0  
ns  
PACKAGE CHARACTERISTICS  
TABLE 5.0  
Package  
Non-hermetic package consisting of an FR4 substrate with grounded metal  
cover.  
PROCESS RECOMMENDATIONS  
Soldering Process  
Wash  
TABLE 6.0  
See the solder profile page 2.  
Ultrasonic cleaning is not recommended.  
ORDERING INFORMATION  
Notes  
1.0  
2.0  
Inclusive of calibration @ 25°C, frequency stability vs. temperature, control voltage (Vc) = 1.65 Vdc.  
Absolute pull range (APR) is the minimum guaranteed pull range of the VCXO under all conditions over lifetime  
operation including aging for ten years. The APR is referenced to Fo.  
When oscillator is disabled the true output is in a low state (Vol) and the complementary output is in the high  
state (VoH)  
VPLD61J3EG5 - 155.52MHz  
3.0  
4.0  
VCXO  
SERIES  
CENTER  
FREQUENCY  
50 ohm termination into Vcc-2V or Thevein equivalent.  
Specifications subject to change without notice.  
08/10/06  
Vx567  
1
2
00  
REV:  
Copyright 2001 Connor-Winfield all rights reserved.  
DATASHEET #:  
PAGE  
OF  
DATE:  
a
12

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