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VP2206N3-G-P013 PDF预览

VP2206N3-G-P013

更新时间: 2024-09-21 02:52:11
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
14页 824K
描述
P-Channel Enhancement-Mode Vertical DMOS FET

VP2206N3-G-P013 数据手册

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VP2206  
P-Channel Enhancement-Mode Vertical DMOS FET  
Features  
General Description  
• Free from Secondary Breakdown  
• Low Power Drive Requirement  
• Ease of Paralleling  
The VP2206 Enhancement-mode (normally-off)  
transistor uses a vertical DMOS structure and a  
well-proven silicon-gate manufacturing process. This  
combination produces a device with the power  
handling capabilities of bipolar transistors and the high  
input impedance and positive temperature coefficient  
inherent in MOS devices. Characteristic of all MOS  
structures, this device is free from thermal runaway and  
thermally induced secondary breakdown.  
• Low CISS and Fast Switching Speeds  
• Excellent Thermal Stability  
• Integral Source-to-Drain Diode  
• High Input Impedance and High Gain  
Applications  
Microchip’s vertical DMOS FETs are ideally suited for a  
wide range of switching and amplifying applications  
where very low threshold voltage, high breakdown  
voltage, high input impedance, low input capacitance  
and fast switching speeds are desired.  
• Motor Controls  
• Converters  
• Amplifiers  
• Switches  
• Power Supply Circuits  
• Drivers (Relays, Hammers, Solenoids, Lamps,  
Memories, Displays, Bipolar Transistors, etc.)  
Package Types  
3-lead TO-92  
3-lead TO-39  
(Top view)  
(Top view)  
DRAIN  
GATE  
SOURCE  
SOURCE  
DRAIN  
GATE  
See Table 3-1 and Table 3-2 for pin information.  
2021 Microchip Technology Inc. and its subsidiaries  
DS20006009A-page 1  

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