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VNS1NV04 PDF预览

VNS1NV04

更新时间: 2024-11-12 22:10:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 驱动器接口集成电路光电二极管
页数 文件大小 规格书
18页 394K
描述
“OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET

VNS1NV04 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.81
Is Samacsys:N内置保护:TRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL
驱动器位数:1接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:4.9 mm功能数量:1
端子数量:8输出电流流向:SINK
最大输出电流:0.5 A标称输出峰值电流:1.7 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Peripheral Drivers表面贴装:YES
技术:MOS端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
断开时间:5.5 µs接通时间:1 µs
宽度:3.9 mmBase Number Matches:1

VNS1NV04 数据手册

 浏览型号VNS1NV04的Datasheet PDF文件第2页浏览型号VNS1NV04的Datasheet PDF文件第3页浏览型号VNS1NV04的Datasheet PDF文件第4页浏览型号VNS1NV04的Datasheet PDF文件第5页浏览型号VNS1NV04的Datasheet PDF文件第6页浏览型号VNS1NV04的Datasheet PDF文件第7页 
VND1NV04  
/ VNN1NV04 / VNS1NV04  
®
“OMNIFET II”:  
FULLY AUTOPROTECTED POWER MOSFET  
TYPE  
R
I
V
clamp  
DS(on)  
lim  
2
VND1NV04  
VNN1NV04  
VNS1NV04  
250 mΩ  
1.7 A  
40 V  
3
2
1
LINEAR CURRENT LIMITATION  
THERMAL SHUT DOWN  
SOT-223  
SO-8  
SHORT CIRCUIT PROTECTION  
INTEGRATED CLAMP  
LOW CURRENT DRAWN FROM INPUT PIN  
DIAGNOSTIC FEEDBACK THROUGH INPUT  
PIN  
3
1
TO-252 (DPAK)  
ORDER CODES:  
ESD PROTECTION  
DIRECT ACCESS TO THE GATE OF THE  
POWER MOSFET (ANALOG DRIVING)  
TO-252 (DPAK)  
SOT-223  
SO-8  
VND1NV04  
VNN1NV04  
VNS1NV04  
COMPATIBLE WITH STANDARD POWER  
MOSFET  
MOSFETS from DC up to 50KHz applications.  
Built in thermal shutdown, linear current limitation  
and overvoltage clamp protect the chip in harsh  
environments.  
DESCRIPTION  
The VND1NV04, VNN1NV04, VNS1NV04 are  
monolithic  
devices  
designed  
in  
Fault feedback can be detected by monitoring the  
voltage at the input pin.  
STMicroelectronics VIPower M0-3 Technology,  
intended for replacement of standard Power  
BLOCK DIAGRAM  
DRAIN  
2
Overvoltage  
Clamp  
INPUT  
Gate  
Control  
1
Linear  
Current  
Limiter  
Over  
Temperature  
3
SOURCE  
FC01000  
February 2003  
1/18  

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