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VNB35N07 PDF预览

VNB35N07

更新时间: 2024-11-18 22:13:31
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 接口集成电路驱动
页数 文件大小 规格书
13页 142K
描述
”OMNIFET”: FULLY AUTOPROTECTED POWER MOSFET

VNB35N07 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:D2PAK
包装说明:TO-263, D2PAK-3针数:4
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:8.62
Is Samacsys:N内置保护:OVER CURRENT; THERMAL; ZENER CLAMP
输入特性:SCHMITT TRIGGER接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:R-PSSO-G2JESD-609代码:e3
长度:10.14 mm湿度敏感等级:1
功能数量:1端子数量:2
输出特性:OPEN-DRAIN输出电流流向:SINK
标称输出峰值电流:35 A输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TO-263
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):245认证状态:Not Qualified
座面最大高度:4.6 mm表面贴装:YES
技术:MOS端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:2.54 mm
端子位置:SINGLE处于峰值回流温度下的最长时间:30
断开时间:16 µs接通时间:0.8 µs
宽度:9.15 mmBase Number Matches:1

VNB35N07 数据手册

 浏览型号VNB35N07的Datasheet PDF文件第2页浏览型号VNB35N07的Datasheet PDF文件第3页浏览型号VNB35N07的Datasheet PDF文件第4页浏览型号VNB35N07的Datasheet PDF文件第5页浏览型号VNB35N07的Datasheet PDF文件第6页浏览型号VNB35N07的Datasheet PDF文件第7页 
VNP35N07FI  
VNB35N07/VNV35N07  
”OMNIFET”:  
FULLY AUTOPROTECTED POWER MOSFET  
TYPE  
Vclamp  
RDS(on)  
Ilim  
VNP35N07FI  
VNB35N07  
VNV35N07  
70 V  
70 V  
70 V  
0.028 Ω  
0.028 Ω  
0.028 Ω  
35 A  
35 A  
35 A  
LINEAR CURRENT LIMITATION  
THERMAL SHUT DOWN  
SHORT CIRCUIT PROTECTION  
INTEGRATED CLAMP  
LOW CURRENT DRAWN FROM INPUT PIN  
DIAGNOSTIC FEEDBACK THROUGH INPUT  
PIN  
ISOWATT220  
3
2
1
ESD PROTECTION  
DIRECT ACCESS TO THE GATE OF THE  
POWER MOSFET (ANALOG DRIVING)  
COMPATIBLE WITH STANDARD POWER  
MOSFET  
10  
3
1
1
D2PAK  
TO-263  
PowerSO-10  
DESCRIPTION  
The VNP35N07FI, VNB35N07 and VNV35N07  
are  
monolithic  
devices  
made  
using  
STMicroelectronics VIPower M0 Technology,  
intended for replacement of standard power  
MOSFETS in DC to 50 KHz applications. Built-in  
thermal shut-down, linear current limitation and  
overvoltage clamp protect the chip in harsh  
enviroments.  
Fault feedback can be detected by monitoring the  
voltage at the input pin.  
BLOCK DIAGRAM ( )  
( ) PowerSO-10 Pin Configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB  
June 1998  
1/13  

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