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VN3205N3-G-P002 PDF预览

VN3205N3-G-P002

更新时间: 2024-11-11 02:52:39
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
14页 858K
描述
N-Channel Enhancement-Mode Vertical DMOS FET

VN3205N3-G-P002 数据手册

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VN3205  
N-Channel Enhancement-Mode Vertical DMOS FET  
Features  
General Description  
• Free from Secondary Breakdown  
• Low Power Drive Requirement  
• Ease of Paralleling  
The VN3205 Enhancement-mode (normally-off)  
transistor uses a vertical DMOS structure and a  
well-proven silicon-gate manufacturing process. This  
combination produces a device with the power  
handling capabilities of bipolar transistors and the high  
input impedance and positive temperature coefficient  
inherent in MOS devices. Characteristic of all MOS  
structures, this device is free from thermal runaway and  
thermally induced secondary breakdown.  
• Low CISS and Fast Switching Speeds  
• Excellent Thermal Stability  
• Integral Source-Drain Diode  
• High Input Impedance and High Gain  
Applications  
Microchip’s vertical DMOS FETs are ideally suited to a  
wide range of switching and amplifying applications  
where very low threshold voltage, high breakdown  
voltage, high input impedance, low input capacitance,  
and fast switching speeds are desired.  
• Motor Controls  
• Converters, Amplifiers, and Switches  
• Power Supply Circuits  
• Drivers (Relays, Hammers, Solenoids, Lamps,  
Memories, Displays, Bipolar Transistors, etc.)  
Package Types  
3-lead TO-92  
(Top view)  
3-lead SOT-89  
(Top view)  
DRAIN  
DRAIN  
SOURCE  
DRAIN  
GATE  
SOURCE  
GATE  
See Table 3-1 and Table 3-2 for pin information.  
2021 Microchip Technology Inc.  
DS20005995A-page 1  

VN3205N3-G-P002 替代型号

型号 品牌 替代类型 描述 数据表
VN3205N3-G MICROCHIP

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N-Channel Enhancement-Mode Vertical DMOS FET

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