Datasheet > VN3205_07

VN3205_07

更新时间： 2024-11-10 03:19:39

品牌	Logo	应用领域
超科 - SUPERTEX		/
页数	文件大小	规格书
8页	849K
描述
N-Channel Enhancement-Mode Vertical DMOS FETs

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

VN3205_07 数据手册

VN3205

N-Channel Enhancement-Mode

Vertical DMOS FETs

Features

General Description

► Free from secondary breakdown

► Low power drive requirement

► Ease of paralleling

These enhancement-mode (normally-off) transistors utilize a

vertical DMOS structure and Supertex’s well-proven silicon-gate

manufacturing process. This combination produces devices with

the power handling capabilities of bipolar transistors and with

the high input impedance and positive temperature coefﬁcient

inherent in MOS devices. Characteristic of all MOS structures,

these devices are free from thermal runaway and thermally

induced secondary breakdown.

► Low C_ISSand fast switching speeds

► Excellent thermal stability

► Integral SOURCE-DRAIN diode

► High input impedance and high gain

► Complementary N- and P-Channel devices

Applications

Supertex’s vertical DMOS FETs are ideally suited to a wide range

of switching and amplifying applications where high breakdown

voltage, high input impedance, low input capacitance, and fast

switching speeds are desired.

► Motor controls

► Converters

► Ampliﬁers

► Switches

► Power supply circuits

► Drivers (relays, hammers, solenoids, lamps,

memories, displays, bipolar transistors, etc.)

Ordering Information

R_DS(ON)

max

(Ω)

V_GS(th)

max

(V)

BV_DSS/BV_DGS

14-Lead

PDIP

TO-243AA

(SOT-89)

Device

TO-92

Die⁽¹⁾

(V)

VN3205 VN3205N3-G

VN3205P-G

VN3205N8-G

VN3205ND

0.3

2.4

-G indicates package is RoHS compliant (‘Green’)

Note:

(1) MIL visual screening available.

Pin Conﬁgurations

DRAIN

GATE

SOURCE

DRAIN

SOURCE

DRAIN

Absolute Maximum Ratings

Parameter

Value

BV_DSS

GATE

Drain to source voltage

Drain to gate voltage

TO-243AA (SOT-89) (N8)

TO-92 (N3)

BV_DGS

Gate to source voltage

20V

N/C

Operating and storage temperature

Soldering temperature^*

Absolute Maximum Ratings are those values beyond which damage to the device

may occur. Functional operation under these conditions is not implied. Continuous

operation of the device at the absolute rating level may affect device reliability. All

voltages are referenced to device ground.

-55°C to +150°C

+300°C

N/C

* Distance of 1.6mm from case for 10 seconds.

14-Lead PDIP (P)

12 3 4 5 6 7 8

中文翻译

下载PDF

与VN3205_07相关器件

型号	品牌	获取价格	描述	数据表
VN3205N3	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
VN3205N3-G	SUPERTEX	获取价格	Small Signal Field-Effect Transistor, 1.2A I(D), 50V, 1-Element, N-Channel, Silicon, Metal
VN3205N3-G	MICROCHIP	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
VN3205N3-GP002	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
VN3205N3-G-P002	MICROCHIP	获取价格	N-Channel Enhancement-Mode Vertical DMOS FET
VN3205N3-GP003	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
VN3205N3-GP005	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
VN3205N3-GP013	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
VN3205N3-GP014	SUPERTEX	获取价格	N-Channel Enhancement-Mode Vertical DMOS FETs
VN3205N3P001	SUPERTEX	获取价格	Small Signal Field-Effect Transistor, 1.2A I(D), 50V, 1-Element, N-Channel, Silicon, Metal

与VN3205_07相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

24
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

24
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

50
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

40

产品中心

服务支持

精选活动

关于我们

帮助中心

VN3205_07

VN3205_07 数据手册

与VN3205_07相关器件

与VN3205_07相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

VN3205_07

VN3205_07 数据手册

与VN3205_07相关器件

与VN3205_07相关文章

您还可以找

您在本页遇到什么问题？