5秒后页面跳转
VJ06C4Y181MXAPW1BC PDF预览

VJ06C4Y181MXAPW1BC

更新时间: 2024-11-11 20:10:59
品牌 Logo 应用领域
威世 - VISHAY 电容器
页数 文件大小 规格书
4页 83K
描述
ISOLATED C NETWORK, 50V, X7R, 0.00018uF, SURFACE MOUNT, CHIP-8, CHIP, HALOGEN FREE AND ROHS COMPLIANT

VJ06C4Y181MXAPW1BC 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:CHIP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8532.25.00.45风险等级:5.82
电容:0.00018 µF电容器类型:ARRAY/NETWORK CAPACITOR
JESD-609代码:e3长度:3.2 mm
安装特点:SURFACE MOUNT负容差:20%
网络类型:ISOLATED C NETWORK元件数量:1
功能数量:4端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装代码:CHIP封装形状:RECTANGULAR PACKAGE
包装方法:TR, PAPER, 13 INCH正容差:20%
额定(直流)电压(URdc):50 V座面最大高度:0.9 mm
表面贴装:YES温度特性代码:X7R
温度系数:15% ppm/ °C端子面层:Matte Tin (Sn) - with Nickel (Ni) barrier
端子节距:0.8 mm端子形状:WRAPAROUND
宽度:1.6 mmBase Number Matches:1

VJ06C4Y181MXAPW1BC 数据手册

 浏览型号VJ06C4Y181MXAPW1BC的Datasheet PDF文件第2页浏览型号VJ06C4Y181MXAPW1BC的Datasheet PDF文件第3页浏览型号VJ06C4Y181MXAPW1BC的Datasheet PDF文件第4页 
VJ....W1BC MLCC Chip Array  
Vishay  
Surface Mount Multilayer Ceramic Chip Capacitors  
Array for Commodity Applications  
FEATURES  
High density mounting due to mounting  
space saving  
RoHS  
COMPLIANT  
Mounting cost saving  
Increased throughput  
Dry sheet manufacturing technology  
Noble Metal Electrode system (NME) for C0G (NP0)  
Base Metal Electrode system (BME) for X7R, Y5V  
Compliant to RoHS directive 2002/95/EC  
Halogen-free according to IEC 61249-2-21  
APPLICATIONS  
For use as a bypass for digital and analog signal line noise  
Computer motherboards and peripherals  
The common electronic circuits  
ELECTRICAL SPECIFICATION  
Size  
4 x 0603  
Dielectric  
Capacitance (1)  
Capacitance Tolerance (2)  
C0G (NP0)  
10 pF to 470 pF  
J ( 5 %), K ( 10 %)  
50 V  
X7R  
Y5V  
180 pF to 100 nF  
K ( 10 %), M ( 20 %)  
16 V, 50 V  
10 nF to 100 nF  
Z (- 20 %/+ 80 %)  
50 V  
Rated Voltage (Vdc)  
U
R = 50 V: 2.5 %  
Cap. < 30 pF: Q 400 + 20 C  
Cap. 30 pF: Q 1000 C  
tan δ/Q (1)  
5 %  
UR = 16 V: 3.5 %  
10 GΩ  
10 GΩ or R x C 500 Ω x F, whichever is less  
Insulation Resistance at UR  
Operating Temperature  
Capacitance Change  
Termination  
- 55 °C to + 125 °C  
- 25 to + 85 °C  
30 ppm  
15 %  
+ 30 %/- 80 %  
Ni/Sn lead (Pb)-free termination  
Notes  
(1) Measured at 30 % ~ 70 % related humidity  
NP0: apply 1.0 Vrms 0.2 Vrms, 1.0 MHz 10 % at the conditions of 25 °C ambient temperature  
X7R: apply 1.0 Vrms 0.2 Vrms, 1.0 kHz 10 % at the conditions of 25 °C ambient temperature  
Y5V: apply 1.0 Vrms 0.2 Vrms, 1.0 kHz 10 % at the conditions of 25 °C ambient temperature  
(2) Preconditioning for X7R, Y5V MLCC: Perform a heat treatment at 150 °C 10 °C for 1 h, then leave in ambient condition for 24 h 2 h  
before measurement.  
ORDERING INFORMATION  
VJ06C4  
A
100  
J
X
A
C
W1BC  
SIZE  
CODE  
DIELECTRIC  
CAPACITANCE  
TOLERANCE  
TERMINATION  
RATED  
VOLTAGE  
PACKAGING  
PROCESS CODE FOR  
BASIC COMMODITY  
06C4  
A = C0G (NP0)  
Y = X7R  
Two significant  
digits  
J = 5 %  
K = 10 %  
M = 20 %  
X = Ni Barrier  
J = 16 V  
A = 50 V  
C = 7" reel paper  
tape  
V = Y5V  
followed by the  
number of zeros. Z = - 20 %/+ 80 %  
100 = 10 pF  
101 = 100 pF  
Document Number: 28539  
Revision: 15-Dec-09  
For technical questions, contact: mlcc@vishay.com  
www.vishay.com  
1

与VJ06C4Y181MXAPW1BC相关器件

型号 品牌 获取价格 描述 数据表
VJ07012300J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07214500J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07413200J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07414500J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07415000J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07415500J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07418000J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07418500J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07419000J0G AMPHENOL

获取价格

Barrier Strip Terminal Block
VJ07419500J0G AMPHENOL

获取价格

Barrier Strip Terminal Block