Datasheet > VETH100A1DD1

VETH100A1DD1

更新时间： 2024-10-03 14:55:15

品牌	Logo	应用领域
威世 - VISHAY		/
页数	文件大小	规格书
6页	170K
描述
Single-Line Bidirectional ESD-Protection Diode in DFN1006-2B

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VETH100A1DD1 数据手册

VETH100A1DD1

Vishay Semiconductors

www.vishay.com

Single-Line Bidirectional ESD-Protection Diode in DFN1006-2B

FEATURES

Available

• Compact DFN1006-2B package

• Low package height < 0.5 mm

• 1-line bidirectional ESD-protection

• AEC-Q101 qualified available

• OPEN Alliance 100Base-T1 and 1000Base-T1

compliant

• Working range 24 V

• Trigger voltage >100 V

• Capacitance < 2 pF

MARKING (example only)

• ESD immunity acc. ISO 10605 and

IEC 61000-4-2 (150 pF/330 Ω)

15 kV (1000 x contact discharge)

XYY

Bar = pin 1 marking

X = date code

• Lead plating: Sn (e3)

YY = type code (see table below)

- Including wettable side walls (flanks)

- Soldering can be checked by standard vision inspection

- AOI = automated optical inspection

LINKS TO ADDITIONAL RESOURCES

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

3D Models

Models

ORDERING INFORMATION

ENVIRONMENTAL AND QUALITY CODE

PACKAGING CODE

PART NUMBER

(EXAMPLE)

RoHS-COMPLIANT +

10K PER 7" REEL

(8 mm TAPE)

ORDERING CODE

(EXAMPLE)

AEC-Q101

QUALIFIED

TIN

PLATED

LEAD (Pb)-FREE TERMINATIONS

REV.

GREEN

10K = MOQ

VETH100A1DD1

VETH100A1DD1-G3-08

VETH100A1DD1HG3-08

PACKAGE DATA

PACKAGE

NAME

TYPE

CODE

MOLDING COMPOUND

FLAMMABILITY RATING

MOISTURE

SENSITIVITY LEVEL

SOLDERING

CONDITIONS

DEVICE NAME

WEIGHT

MSL level 1

Peak temperature

max. 260 °C

VETH100A1DD1 DFN1006-2B

0.83 mg

UL 94 V-0

(according J-STD-020)

ABSOLUTE MAXIMUM RATINGS (T_amb= 25 °C, unless otherwise specified)

PARAMETER

TEST CONDITIONS

SYMBOL

VALUE

UNIT

Contact discharge acc. ISO 10605 and

IEC 61000-4-2 (150 pF/330 Ω); 1000 pulses

ESD immunity

V_ESD

Operating temperature

Storage temperature

Junction temperature

T_J

-55 to +150

°C

T_stg

ELECTRICAL CHARACTERISTICS (T_amb= 25 °C, unless otherwise specified)

PARAMETER

TEST CONDITIONS / REMARKS

Number of lines which can be protected

Max. working voltage

SYMBOL MIN.

TYP.

MAX.

UNIT

lines

Protection paths

Stand off voltage

Leakage current

Trigger voltage

N_channel

V_RWM

I_R

100

At V_R= 24 V

Transmission line pulse (TLP) = 100 ns; I_TLP= 1 A

At I_TLP= 1 A, t_p= 100 ns (TLP)

At I_TLP= 10 A, t_p= 100 ns (TLP)

t_p= 100 ns (TLP)

V_T

100

V_C

0.4

1.7

1.4

Clamping voltage

Dynamic resistance

Capacitance

V_C

r_dyn

C_D

At V_R= 0 V; f = 1 MHz; V_AC10 mV

At V_R= 0 V; f = 1 MHz; V_AC1 V

2.0

C_D

Rev. 1.1, 04-Jul-2023

Document Number: 86195

For technical questions, contact: ESDprotection@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

12 3 4 5 6

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