Datasheet > VDS4616A4A-5

VDS4616A4A-5

更新时间： 2022-03-25 20:05:05

品牌	Logo	应用领域
威刚科技 - ADATA		动态存储器
页数	文件大小	规格书
8页	497K
描述
Synchronous DRAM(512K X 16 Bit X 2 Banks)

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VDS4616A4A-5 数据手册

V-Data

VDS4616A4A

512K x 16 Bit x 2 Banks

Synchronous DRAM

General Description

Features

•Single 3.3V +/- 0.3V power supply

The VDS4616A4A are two-bank Synchronous

DRAMs organized as 524,288 words x 16 bits x 2

banks,

•MRS Cycle with address key programs

-CAS Latency (2 & 3)

Synchronous design allows precise cycle control

with the use of system clock I/O transactions are

possible on every clock cycle.

Range of operating frequencies, programmable

burst length and programmable latencies allow the

same device to be useful for a variety of high

bandwidth high performance memory system

applications

-Burst Length (1,2,4,8, & full page)

-Burst Type (sequential & Interleave)

•2 banks operation

•All inputs are sampled at the positive edge of

the system clock

•Burst Read single write operation

•Auto & Self refresh

•4096 refresh cycle

•DQM for masking

•Package:50-pins 400 mil TSOP-Type II

Ordering Information.

Part No.

Frequency

200Mhz

166Mhz

143Mhz

Interface

Package

VDS4616A4A-5

VDS4616A4A -6

VDS4616A4A -7

LVTTL

400mil 50pin TSOPII

Pin Assignment

Vss

DQ0

DQ15

DQ14

DQ1

V_SSQ

Vss

DQ2

DQ13

DQ12

DQ3

V_DDQ

V_DD

DQ11

DQ4

DQ5

DQ10

V_SSQ

SSQ

DQ9

DQ6

DQ8

V_DDQ

DQ7

V_DDQ

LDQM

/WE

UDQM

CLK

/CAS

/RAS

CKE

/CS

(BS)A11

A10

V_DD

50-pin plastic TSOP II 400 mil

Rev 1 December, 2001

12 3 4 5 6 7 8

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