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V62/14604-01XE PDF预览

V62/14604-01XE

更新时间: 2023-06-19 15:25:30
品牌 Logo 应用领域
德州仪器 - TI 驱动总线驱动器总线收发器
页数 文件大小 规格书
13页 767K
描述
具有三态输出的增强型产品 2 通道、1.65V 至 5.5V 缓冲器 | DCU | 8 | -55 to 125

V62/14604-01XE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP-8针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:1.71控制类型:ENABLE HIGH
计数方向:UNIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:2.3 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.032 A湿度敏感等级:1
位数:1功能数量:2
端口数量:2端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:VSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):NOT SPECIFIED
最大电源电流(ICC):0.01 mAProp。Delay @ Nom-Sup:6.8 ns
传播延迟(tpd):15.2 ns座面最大高度:0.9 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:2 mmBase Number Matches:1

V62/14604-01XE 数据手册

 浏览型号V62/14604-01XE的Datasheet PDF文件第2页浏览型号V62/14604-01XE的Datasheet PDF文件第3页浏览型号V62/14604-01XE的Datasheet PDF文件第4页浏览型号V62/14604-01XE的Datasheet PDF文件第5页浏览型号V62/14604-01XE的Datasheet PDF文件第6页浏览型号V62/14604-01XE的Datasheet PDF文件第7页 
SN74LVC2G126-EP  
www.ti.com  
SCES856 DECEMBER 2013  
DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS  
Check for Samples: SN74LVC2G126-EP  
1
FEATURES  
Supports 5-V VCC Operation  
SUPPORTS DEFENSE, AEROSPACE,  
AND MEDICAL APPLICATIONS  
Inputs Accept Voltages to 5.5 V  
Max tpd of 6.8 ns at 3.3 V  
Controlled Baseline  
One Assembly and Test Site  
One Fabrication Site  
Low Power Consumption, 10-μA Max ICC  
±24-mA Output Drive at 3.3 V  
Available in Military (–55°C to 125°C)  
Temperature Range  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
Extended Product Life Cycle  
Extended Product-Change Notification  
Product Traceability  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
DCU PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
VCC  
2OE  
1Y  
1
2
3
4
8
7
6
5
1OE  
1A  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
2Y  
GND  
2A  
1000-V Charged-Device Model (C101)  
DESCRIPTION  
This dual bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.  
The SN74LVC2G126 is a dual bus driver/line driver with 3-state outputs. The outputs are disabled when the  
associated output-enable (OE) input is low.  
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a  
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION(1)  
TJ  
PACKAGE(2)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
VID NUMBER  
–55°C to 125°C  
VSSOP - DCU Tape of 250  
CLVC2G126MDCUTEP  
CEPR  
V62/14604-01XE  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Function Table  
(Each Buffer)  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
X
Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2013, Texas Instruments Incorporated  

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