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V62/12602-01XE

更新时间： 2024-11-05 11:06:59
品牌 Logo 应用领域
德州仪器 - TI 开关双倍数据速率
页数 文件大小 规格书
29页 651K
描述
增强型产品 DDR1、DDR2、DDR3 转换开关和 LDO | PWP | 20 | -55 to 125

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V62/12602-01XE 数据手册

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TPS51116  
www.ti.com  
SLUS609A–MAY 2004–REVISED JUNE 2004  
COMPLETE DDR AND DDR2 MEMORY POWER SOLUTION  
SYNCHRONOUS BUCK CONTROLLER, 3-A LDO, BUFFERED REFERENCE  
FEATURES  
DESCRIPTION  
•
Synchronous Buck Controller (VDDQ)  
The TPS51116 provides a complete power supply for  
both DDR/SSTL-2 and DDR2/SSTL-18 memory sys-  
tems. It integrates a synchronous buck controller with  
a 3-A sink/source tracking linear regulator and  
buffered low noise reference. The TPS51116 offers  
the lowest total solution cost in systems where space  
is at a premium. The TPS51116 synchronous control-  
ler runs fixed 400kHz pseudo-constant frequency  
PWM with an adaptive on-time control that can be  
configured in D-CAP™ Mode for ease of use and  
fastest transient response or in current mode to  
support ceramic output capacitors. The 3-A  
sink/source LDO maintains fast transient response  
only requiring 20-µF (2 × 10 µF) of ceramic output  
capacitance. In addition, the LDO supply input is  
available externally to significantly reduce the total  
power losses. The TPS51116 supports all of the  
sleep state controls placing VTT at high-Z in S3  
(suspend to RAM) and discharging VDDQ, VTT and  
VTTREF (soft-off) in S4/S5 (suspend to disk). The  
TPS51116 has all of the protection features including  
thermal shutdown and is in a 20-pin HTSSOP  
PowerPAD™ package.  
– Wide-Input Voltage Range: 3.0-V to 28-V  
– D–CAP™ Mode with 100-ns Load Step Re-  
sponse  
– Current Mode Option Supports Ceramic  
Output Capacitors  
– Supports Soft-Off in S4/S5 States  
– Current Sensing from RDS(on) or Resistor  
– 2.5-V (DDR), 1.8-V (DDR2) or Adjustable  
Output (1.5-V to 3.0-V)  
– Equipped with Powergood, Overvoltage Pro-  
tection and Undervoltage Protection  
•
3-A LDO (VTT), Buffered Reference (VREF)  
– Capable to Sink and Source 3 A  
– LDO Input Available to Optimize Power  
Losses  
– Requires only 20-µF Ceramic Output Ca-  
pacitor  
– Buffered Low Noise 10-mA Output  
– Accuracy ±20 mV for both VREF and VTT  
– Supports High-Z in S3 and Soft-Off in S4/S5  
– Thermal Shutdown  
APPLICATIONS  
•
DDR/DDR2 Memory Power Supplies  
•
SSTL-2 SSTL-18 and HSTL Termination  
TYPICAL APPLICATION  
(DDR2)  
C1  
Ceramic  
V
IN  
TPS51116PWP  
C5  
Ceramic  
2 × 10 µF  
1
2
3
VLDOIN VBST 20  
L1  
1 µH  
VTT  
0.9 V  
2 A  
0.1 µF  
VTT  
DRVH 19  
VDDQ  
1.8 V  
10 A  
VTTGND  
LL 18  
GND  
C8  
SP−CAP  
2 × 150 µF  
4
5
6
7
8
9
VTTSNS DRVL 17  
C3  
Ceramic  
GND  
PGND 16  
CS 15  
2 × 10 µF  
R1  
C4  
MODE  
VTTREF  
Ceramic  
0.033 µF  
V5IN 14  
VREF  
5V_IN  
0.9 V  
R2  
10 mA  
COMP PGOOD 13  
VDDQSNS S5 12  
C2  
PGOOD  
S5  
Ceramic  
4.7 µF  
GND  
10 VDDQSET S3 11  
S3  
UDG−04058  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004, Texas Instruments Incorporated  
1234567...29

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