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V62/07644-01XA

更新时间： 2024-11-04 03:05:19
品牌 Logo 应用领域
德州仪器 - TI 微控制器和处理器外围集成电路数字信号处理器装置时钟
页数 文件大小 规格书
170页 1382K
描述
Video/Imaging Fixed Point Digital Signal Processor

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V62/07644-01XA 技术参数

生命周期：Active零件包装代码：BGA
包装说明：FBGA, BGA548,26X26,32针数：548
Reach Compliance Code：not_compliantECCN代码：3A001.A.2.C
HTS代码：8542.31.00.01Factory Lead Time：6 weeks
风险等级：5.24其他特性：ALSO REQUIRES 3.3V SUPPLY
地址总线宽度：23桶式移位器：NO
位大小：32边界扫描：YES
最大时钟频率：75 MHz外部数据总线宽度：64
格式：FIXED POINT集成缓存：YES
内部总线架构：MULTIPLEJESD-30 代码：S-PBGA-B548
JESD-609代码：e0长度：23 mm
低功率模式：YES湿度敏感等级：4
DMA 通道数量：64外部中断装置数量：4
端子数量：548计时器数量：3
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：FBGA
封装等效代码：BGA548,26X26,32封装形状：SQUARE
封装形式：GRID ARRAY, FINE PITCH峰值回流温度（摄氏度）：220
电源：1.2,3.3 V认证状态：Not Qualified
RAM（字数）：131072座面最大高度：2.8 mm
子类别：Digital Signal Processors最大供电电压：1.44 V
最小供电电压：1.36 V标称供电电压：1.4 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：BALL端子节距：0.8 mm
端子位置：BOTTOM处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：23 mmuPs/uCs/外围集成电路类型：DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches：1

V62/07644-01XA 数据手册

 浏览型号V62/07644-01XA的Datasheet PDF文件第2页浏览型号V62/07644-01XA的Datasheet PDF文件第3页浏览型号V62/07644-01XA的Datasheet PDF文件第4页浏览型号V62/07644-01XA的Datasheet PDF文件第5页浏览型号V62/07644-01XA的Datasheet PDF文件第6页浏览型号V62/07644-01XA的Datasheet PDF文件第7页 
SM320DM642-EP  
Video/Imaging Fixed Point Digital Signal Processor  
www.ti.com  
SGUS058B–JUNE 2007–REVISED JANUARY 2008  
1 SM320DM642 Video/Imaging Fixed-Point Digital Signal Processor  
1.1 Features  
–
VelociTI.2™ Increased Orthogonality  
•
Controlled Baseline  
One Assembly/Test/Fabrication Site  
•
L1/L2 Memory Architecture  
–
–
–
–
128K Bit (16K Byte) L1P Program Cache  
(Direct Mapped)  
128K Bit (16K Byte) L1D Data Cache (2-Way  
Set-Associative)  
2M Bit (256K Byte) L2 Unified Mapped  
RAM/Cache (Flexible RAM/Cache  
Allocation)  
•
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
•
•
•
Enhanced Product-Change Notification  
Qualification Pedigree(1)  
High-Performance Digital Media Processor  
–
2 ns, 1.67 ns, 1.39 ns Instruction Cycle  
Time  
•
Endianess: Little Endian, Big Endian  
–
–
–
500 MHz, 600 MHz, 720 MHz Clock Rate  
(500/600 MHz devices are product preview  
only)  
64 Bit External Memory Interface (EMIF)  
Glueless Interface to Asynchronous  
Memories (SRAM and EPROM) and  
Synchronous Memories (SDRAM, SBSRAM,  
ZBT SRAM, and FIFO)  
–
–
–
Eight 32-Bit Instructions/Cycle  
4000 MIPS, 4800 MIPS, 5760 MIPS  
Fully Software-Compatible With C64x™  
•
•
•
1024M-Byte Total Addressable External  
Memory Space  
•
VelociTI.2™ Extensions to VelociTI™  
Advanced Very Long Instruction Word (VLIW)  
TMS320C64x™ DSP Core  
Enhanced Direct-Memory-Access (EDMA)  
Controller (64 Independent Channels)  
–
Eight Highly Independent Functional Units  
With VelociTI.2™ Extensions:  
10/100 Mbps Ethernet MAC (EMAC)  
–
–
–
IEEE 802.3 Compliant  
Media Independent Interface (MII)  
Eight Independent Transmit (TX) Channels  
and One Receive (RX) Channel  
•
Six ALUs (32/40 Bit), Each Supports  
Single 32 Bit, Dual 16 Bit, or Quad 8 Bit  
Arithmetic per Clock Cycle  
•
Two Multipliers Support Four 16 × 16-Bit  
Multiplies (32 Bit Results) per Clock  
Cycle or Eight 8 × 8 Bit Multiplies (16 Bit  
Results) per Clock Cycle  
•
•
Management Data Input/Output (MDIO)  
Three Configurable Video Ports  
–
Provide a Glueless I/F to Common Video  
Decoder and Encoder Devices  
Supports Multiple Resolutions/Video Stds  
–
Load-Store Architecture With Non-Aligned  
Support  
–
–
–
–
64 32-Bit General-Purpose Registers  
Instruction Packing Reduces Code Size  
All Instructions Conditional  
•
VCXO Interpolated Control Port (VIC)  
Supports Audio/Video Synchronization  
–
•
•
Host Port Interface (HPI) [32/16 Bit]  
•
Instruction Set Features  
32 Bit/66 MHz, 3.3-V Peripheral Component  
Interconnect (PCI) Master/Slave Interface  
Conforms to PCI Specification 2.2  
–
–
–
–
Byte Addressable (8/16/32/64 Bit Data)  
8-Bit Overflow Protection  
Bit Field Extract, Set, Clear  
•
Multichannel Audio Serial Port (McASP)  
Normalization, Saturation, Bit-Counting  
–
–
Eight Serial Data Pins  
Wide Variety of I2S and Similar Bit Stream  
Format  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
–
Integrated Digital Audio I/F Transmitter  
Supports S/PDIF, IEC60958-1, AES-3,  
CP-430 Formats  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
•
Inter-Integrated Circuit (I2C Bus™)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this document.  
C64x, VelociTI.2, VelociTI, TMS320C64x, C6000, TMS320C6000, DM64x, C62x, TMS320C62x, TMS320C67x, Code Composer Studio,  
DSP/BIOS, XDS, TMS320 are trademarks of Texas Instruments.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2007–2008, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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V62/07644-01XA 替代型号

型号 品牌 替代类型 描述 数据表
SM320DM642AGDKI7EP TI

完全替代

 Video/Imaging Fixed Point Digital Signal Processor

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