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V62/04696-01XE PDF预览

V62/04696-01XE

更新时间: 2024-09-30 11:58:27
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
17页 588K
描述
8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS

V62/04696-01XE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-16针数:16
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5.17
Is Samacsys:N其他特性:SISO OPERATION ALSO AVAILABLE
计数方向:RIGHT系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:SERIAL IN PARALLEL OUT最大频率@ Nom-Sup:40000000 Hz
最大I(ol):0.05 A湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):0.02 mA
传播延迟(tpd):25.5 ns认证状态:Not Qualified
施密特触发器:No座面最大高度:1.2 mm
子类别:Shift Registers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:4.4 mm
最小 fmax:115 MHzBase Number Matches:1

V62/04696-01XE 数据手册

 浏览型号V62/04696-01XE的Datasheet PDF文件第2页浏览型号V62/04696-01XE的Datasheet PDF文件第3页浏览型号V62/04696-01XE的Datasheet PDF文件第4页浏览型号V62/04696-01XE的Datasheet PDF文件第5页浏览型号V62/04696-01XE的Datasheet PDF文件第6页浏览型号V62/04696-01XE的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢆꢈ ꢉꢊ ꢋ  
ꢌ ꢉꢍꢎ ꢏ ꢀꢐ ꢎꢑ ꢏ ꢒ ꢊꢓ ꢎ ꢀ ꢏꢊ ꢒ  
ꢔ ꢎꢏ ꢐ ꢕ ꢉꢀꢏꢈꢏ ꢊ ꢖ ꢗꢏ ꢋꢗꢏ ꢒꢊꢓ ꢎ ꢀ ꢏꢊ ꢒꢀ  
SCLS568B − JANUARY 2004 − REVISED MAY 2004  
D
D
D
D
D
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
Supports Mixed-Mode Voltage Operation on  
All Ports  
D
8-Bit Serial-In, Parallel-Out Shift  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
Enhanced Product-Change Notification  
D
Shift Register Has Direct Clear  
Qualification Pedigree  
PW PACKAGE  
(TOP VIEW)  
2-V to 5.5-V V  
Operation  
CC  
Max t of 7.4 ns at 5 V  
pd  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
Q
Q
V
CC  
OLP  
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
B
Q
A
C
D
A
Q
SER  
OE  
D
Typical V  
>2.3 V at V  
(Output V  
= 3.3 V, T = 25°C  
Undershoot)  
OHV  
CC  
OH  
Q
E
Q
A
12 RCLK  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
F
11  
10  
9
Q
SRCLK  
SRCLR  
G
Q
H
GND  
Q
H′  
description/ordering information  
The SN74LV595A is an 8-bit shift register designed for 2-V to 5.5-V V  
operation.  
CC  
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The  
storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register.  
The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output for  
cascading. When the output-enable (OE) input is high, all outputs except Q are in the high-impedance state.  
H′  
Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both  
clocks are connected together, the shift register always is one clock pulse ahead of the storage register.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
The device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
−40°C to 85°C  
TSSOP − PW Reel of 2000  
SN74LV595AIPWREP  
LV595EP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢏꢥ  
Copyright 2004, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

V62/04696-01XE 替代型号

型号 品牌 替代类型 描述 数据表
SN74LV595AIPWREP TI

完全替代

8-BIT SHIFT REGISTER WITH 3-STATE OUTPUT REGISTERS
SN74LV595APWT TI

完全替代

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS
SN74LV595APWR TI

完全替代

8-BIT SHIFT REGISTERS WITH 3-STATE OUTPUT REGISTERS

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