5秒后页面跳转
V62/04681-01XE PDF预览

V62/04681-01XE

更新时间: 2024-02-24 16:21:44
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
12页 328K
描述
3.3-V ABT OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

V62/04681-01XE 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP24,.25针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.5控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:LVT
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:7.8 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:3.5 ns传播延迟(tpd):5.6 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:4.4 mmBase Number Matches:1

V62/04681-01XE 数据手册

 浏览型号V62/04681-01XE的Datasheet PDF文件第2页浏览型号V62/04681-01XE的Datasheet PDF文件第3页浏览型号V62/04681-01XE的Datasheet PDF文件第4页浏览型号V62/04681-01XE的Datasheet PDF文件第5页浏览型号V62/04681-01XE的Datasheet PDF文件第6页浏览型号V62/04681-01XE的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊꢋ ꢌꢍ  
ꢎ ꢏꢎ ꢋꢅ ꢐꢑꢆ ꢒ ꢓꢆꢐꢄ ꢑꢔꢀ ꢆ ꢕꢐꢁꢀ ꢓꢌꢖ ꢅꢌꢕ ꢐꢁꢗ ꢕ ꢌꢘ ꢖ ꢀ ꢆꢌ ꢕ  
ꢙ ꢖꢆ ꢇ ꢎ ꢋꢀꢆꢐꢆ ꢌ ꢒ ꢔꢆ ꢍ ꢔꢆꢀ  
SCBS776 − NOVEMBER 2003  
D
D
D
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Enhanced Product-Change Notification  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Qualification Pedigree  
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
PW PACKAGE  
(TOP VIEW)  
3.3-V V  
)
CC  
D
D
D
Supports Unregulated Battery Operation  
Down To 2.7 V  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLKAB  
SAB  
OEAB  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
2
CLKBA  
SBA  
OEBA  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
3
= 3.3 V, T = 25°C  
A
4
I
and Power-Up 3-State Support Hot  
off  
5
Insertion  
6
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
7
8
9
10  
11  
12  
B8  
description/ordering information  
This bus transceiver and register is designed specifically for low-voltage (3.3-V) V  
capability to provide a TTL interface to a 5-V system environment.  
operation, but with the  
CC  
The SN74LVTH652 consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the data bus or from the internal storage registers.  
Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB  
and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for  
select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between  
real-time and stored data. A low input selects real-time data and a high input selects stored data. Figure 1  
illustrates the four fundamental bus-management functions that can be performed with the SN74LVTH652  
device.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
−40°C to 85°C  
TSSOP − PW Tape and reel  
SN74LVTH652IPWREP  
LH652EP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢆꢥ  
Copyright 2003, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢮ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢏ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

V62/04681-01XE 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH652PWR TI

完全替代

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652DGVRE4 TI

完全替代

3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PW TI

完全替代

3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

与V62/04681-01XE相关器件

型号 品牌 获取价格 描述 数据表
V62/04682-01XE TI

获取价格

VERY LOW-POWER OPERATIONAL AMPLIFIERS
V62/04682-02XE TI

获取价格

VERY LOW-POWER OPERATIONAL AMPLIFIERS
V62/04682-03YE TI

获取价格

VERY LOW-POWER OPERATIONAL AMPLIFIERS
V62/04682-04YE TI

获取价格

VERY LOW-POWER OPERATIONAL AMPLIFIERS
V62/04683-01XE TI

获取价格

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
V62/04683-01YE TI

获取价格

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
V62/04684-01XE TI

获取价格

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
V62/04684-01YE TI

获取价格

QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
V62/04685-01XE TI

获取价格

QUADRUPLE 2-INPUT POSITIVE-NAND GATE
V62/04686-01XE TI

获取价格

QUADRUPLE 2-INPUT POSITIVE-AND GATE