5秒后页面跳转
捷配首页

Datasheet > V62/04674-02YE
V62/04674-02YE PDF预览

V62/04674-02YE

更新时间： 2024-01-15 01:16:21
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
9页 435K
描述
3.3-V ABT OCTAL D-TYPE FLIP-FLOP WITH CLEAR

阅读下载

中文翻译

获取价格

V62/04674-02YE 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP20,.3针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.34
系列：LVTJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.6 mm
负载电容（CL）：50 pF逻辑集成电路类型：D FLIP-FLOP
最大频率@ Nom-Sup：150000000 Hz最大I（ol）：0.064 A
湿度敏感等级：1位数：8
功能数量：1端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：5 mA
Prop。Delay @ Nom-Sup：4.9 ns传播延迟（tpd）：7 ns
认证状态：Not Qualified座面最大高度：2 mm
子类别：FF/Latches最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：BICMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：5.3 mm
最小 fmax：150 MHzBase Number Matches：1

V62/04674-02YE 数据手册

 浏览型号V62/04674-02YE的Datasheet PDF文件第2页浏览型号V62/04674-02YE的Datasheet PDF文件第3页浏览型号V62/04674-02YE的Datasheet PDF文件第4页浏览型号V62/04674-02YE的Datasheet PDF文件第5页浏览型号V62/04674-02YE的Datasheet PDF文件第6页浏览型号V62/04674-02YE的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢂ ꢉꢊ ꢋꢌ  
ꢉ ꢍꢉ ꢊꢅ ꢎꢏꢆ ꢐ ꢑꢆꢎꢄ ꢒꢊꢆ ꢓꢌ ꢋ ꢔ ꢄꢕ ꢌ ꢊꢔ ꢄꢐ ꢌ  
ꢖ ꢕꢆꢇ ꢑ ꢄꢋ ꢎꢗ  
SCBS769A − NOVEMBER 2003 − REVISED JUNE 2006  
D
D
D
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Enhanced Product-Change Notification  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
†
Qualification Pedigree  
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
PW OR NS PACKAGE  
(TOP VIEW)  
3.3-V V  
)
CC  
D
D
D
D
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
A
OLP  
CC  
CLR  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
19 8Q  
1
2
3
4
5
6
7
8
9
10  
20  
Supports Unregulated Battery Operation  
Down to 2.7 V  
18 8D  
Buffered Clock and Direct-Clear Inputs  
Individual Data Input to Each Flip-Flop  
17  
7D  
16  
15  
14  
13  
12  
11  
7Q  
6Q  
6D  
5D  
5Q  
CLK  
I
Supports Partial Power-Down-Mode  
off  
Operation  
†
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
GND  
description/ordering information  
This octal D-type flip-flop is designed specifically for low-voltage (3.3 V) V  
to provide a TTL interface to a 5-V system environment.  
operation, but with the capability  
CC  
The SN74LVTH273 is a positive-edge-triggered flip-flop with a direct clear (CLR) input. Information at the data  
(D) inputs meeting the setup-time requirements is transferred to the Q outputs on the positive-going edge of  
the clock pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition  
time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal  
has no effect at the output.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
This device is fully specified for partial power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
−40°C to 85°C  
−55°C to 125°C  
TSSOP − PW  
SOP − NS  
Tape and reel  
Tape and reel  
SN74LVTH273IPWREP  
SN74LVTH273MNSREP  
LH273EP  
LVTH273EP  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢌ
ꢌ
ꢗ
ꢐ
ꢨ
ꢒ
ꢣ
ꢘ
ꢑ
ꢡ
ꢆ
ꢢ
ꢕ
ꢜ
ꢐ
ꢚ
ꢁ
ꢛ
ꢒ
ꢎ
ꢆ
ꢎ
ꢙ
ꢚ
ꢤ
ꢛ
ꢜ
ꢢ
ꢝ
ꢞ
ꢟ
ꢟ
ꢠ
ꢠ
ꢙ
ꢙ
ꢜ
ꢜ
ꢚ
ꢚ
ꢙ
ꢡ
ꢡ
ꢥ
ꢢ
ꢣ
ꢝ
ꢝ
ꢤ
ꢤ
ꢚ
ꢠ
ꢟ
ꢞ
ꢡ
ꢡ
ꢜ
ꢛ
ꢥ
ꢆꢤ  
ꢣ
ꢦ
ꢡ
ꢧ
ꢙ
ꢢ
ꢟ
ꢡ
ꢠ
ꢙ
ꢠ
ꢜ
ꢝ
ꢚ
ꢣ
ꢨ
ꢟ
ꢚ
ꢠ
ꢠ
ꢤ
ꢡ
ꢍ
Copyright 2006, Texas Instruments Incorporated  
ꢝ
ꢜ
ꢢ
ꢠ
ꢜ
ꢝ
ꢞ
ꢠ
ꢜ
ꢡ
ꢥ
ꢙ
ꢛ
ꢙ
ꢢ
ꢤ
ꢝ
ꢠ
ꢩ
ꢠ
ꢤ
ꢝ
ꢜ
ꢛ
ꢪ
ꢟ
ꢕ
ꢚ
ꢞ
ꢤ
ꢡ
ꢠ
ꢟ
ꢚ
ꢨ
ꢟ
ꢝ
ꢨ
ꢫ
ꢟ
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢭ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢍ  
ꢝ
ꢝ
ꢟ
ꢚ
ꢠ
ꢬ
ꢍ
ꢌ
ꢝ
ꢜ
ꢨ
ꢣ
ꢢ
ꢠ
ꢙ
ꢜ
ꢚ
ꢥ
ꢝ
ꢜ
ꢢ
ꢤ
ꢡ
ꢡ
ꢙ
ꢚ
ꢭ
ꢨ
ꢜ
ꢤ
ꢡ
ꢚ
ꢜ
ꢠ
ꢚ
ꢤ
ꢢ
ꢤ
ꢡ
ꢡ
ꢟ
ꢝ
ꢙ
ꢧ
ꢬ
ꢙ
ꢚ
ꢢ
ꢧ
ꢣ
ꢨ
ꢤ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

下载PDF

V62/04674-02YE 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH273MNSREP TI

完全替代

 暂无描述
SN74LVTH273DWR TI

类似代替

 3.3-V ABT OCTAL D-TYPE FLIP-FLOPS WITH CLEAR
SN74LVTH273DW TI

类似代替

 3.3-V ABT OCTAL D-TYPE FLIP-FLOPS WITH CLEAR

与V62/04674-02YE相关器件

型号 品牌 获取价格 描述 数据表
V62/04675-01XE TI

获取价格

 		3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
V62/04676-01XE TI

获取价格

 		3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
V62/04677-01XE TI

获取价格

 		3.3-V ABT OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
V62/04678-01XE TI

获取价格

 		3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATS OUTPUTS
V62/04679-01XE TI

获取价格

 		3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
V62/04680-01XE TI

获取价格

 		3.3-V ABT OCTAL BUS TRANSVEIVER AND REGISTER WITH 3-STATE OUTPUTS
V62/04681-01XE TI

获取价格

 		3.3-V ABT OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
V62/04682-01XE TI

获取价格

 		VERY LOW-POWER OPERATIONAL AMPLIFIERS
V62/04682-02XE TI

获取价格

 		VERY LOW-POWER OPERATIONAL AMPLIFIERS
V62/04682-03YE TI

获取价格

 		VERY LOW-POWER OPERATIONAL AMPLIFIERS

与V62/04674-02YE相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证