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V62/04665-01XE PDF预览

V62/04665-01XE

更新时间： 2024-01-17 17:45:14
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
9页 409K
描述
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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中文翻译

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V62/04665-01XE 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP20,.4针数：20
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：12 weeks风险等级：5.15
Is Samacsys：N控制类型：ENABLE LOW
计数方向：UNIDIRECTIONAL系列：LVC/LCX/Z
JESD-30 代码：R-PDSO-G20JESD-609代码：e4
长度：12.8 mm逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.024 A湿度敏感等级：1
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TR
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：0.01 mAProp。Delay @ Nom-Sup：5.3 ns
传播延迟（tpd）：7.1 ns认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：2.7 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：7.5 mmBase Number Matches：1

V62/04665-01XE 数据手册

 浏览型号V62/04665-01XE的Datasheet PDF文件第2页浏览型号V62/04665-01XE的Datasheet PDF文件第3页浏览型号V62/04665-01XE的Datasheet PDF文件第4页浏览型号V62/04665-01XE的Datasheet PDF文件第5页浏览型号V62/04665-01XE的Datasheet PDF文件第6页浏览型号V62/04665-01XE的Datasheet PDF文件第7页 
SN74LVC540A-EP  
OCTAL BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS747A–DECEMBER 2003–REVISED AUGUST 2005  
FEATURES  
•
Controlled Baseline  
•
•
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With 3.3-V  
– One Assembly/Test Site, One Fabrication  
Site  
VCC  
)
Ioff Supports Partial-Power-Down Mode  
Operation  
•
•
Extended Temperature Performance of –40°C  
to 125°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
DW OR PW PACKAGE  
(TOP VIEW)  
•
•
•
•
•
•
Enhanced Product-Change Notification  
(1)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE1  
A1  
V
CC  
Qualification Pedigree  
OE2  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
Operates From 2 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.3 ns at 3.3 V  
A2  
A3  
A4  
A5  
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
A6  
A7  
A8  
GND  
•
Typical VOHV (Output VOH Undershoot) >2 V at  
VCC = 3.3 V, TA = 25°C  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
DESCRIPTION/ORDERING INFORMATION  
The SN74LVC540A-EP octal buffer/driver is designed for 2.7-V to 3.6-V VCC operation.  
This device is ideal for driving bus lines or buffer-memory address registers. This device features inputs and  
outputs on opposite sides of the package that facilitate printed circuit board layout.  
The 3-state control gate is a 2-input AND gate with active-low inputs so that, if either output-enable (OE1 or OE2)  
input is high, all outputs are in the high-impedance state.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in  
a mixed 3.3-V/5-V system environment.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
Reel of 2000  
Reel of 2000  
ORDERABLE PART NUMBER  
SN74LVC540AQDWREP  
TOP-SIDE MARKING  
C540AEP  
SOIC – DW  
–40°C to 125°C  
TSSOP – PW  
SN74LVC540AQPWREP  
C540AEP  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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