5秒后页面跳转
V62/04617-01XE PDF预览

V62/04617-01XE

更新时间: 2024-09-14 12:17:03
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 290K
描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

V62/04617-01XE 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:GREEN, SOIC-14针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5.35
Is Samacsys:N系列:AC
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:70000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:1功能数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:3.3/5 V
最大电源电流(ICC):0.04 mAProp。Delay @ Nom-Sup:17.5 ns
传播延迟(tpd):17.5 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:FF/Latches
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:3.91 mm最小 fmax:95 MHz
Base Number Matches:1

V62/04617-01XE 数据手册

 浏览型号V62/04617-01XE的Datasheet PDF文件第2页浏览型号V62/04617-01XE的Datasheet PDF文件第3页浏览型号V62/04617-01XE的Datasheet PDF文件第4页浏览型号V62/04617-01XE的Datasheet PDF文件第5页浏览型号V62/04617-01XE的Datasheet PDF文件第6页浏览型号V62/04617-01XE的Datasheet PDF文件第7页 
ꢔ ꢍꢎ ꢕ ꢅꢋ ꢇꢄꢑ ꢄꢁꢉ ꢈ ꢑꢇ ꢀ ꢇꢎ  
SCAS721 − OCTOBER 2003  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
2-V to 6-V V  
Operation  
CC  
Inputs Accept Voltages to 6 V  
Max t of 10 ns at 5 V  
pd  
D
D
D
Extended Temperature Performance of  
−55°C to 125°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1CLR  
1D  
V
CC  
2CLR  
2D  
Enhanced Product-Change Notification  
D
Qualification Pedigree  
1CLK  
1PRE  
1Q  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
2CLK  
2PRE  
2Q  
1Q  
8
GND  
2Q  
description/ordering information  
The SN74AC74 is a dual positive-edge-triggered D-type flip-flop.  
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the  
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time  
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs  
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,  
data at D can be changed without affecting the levels at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
−55°C to 125°C  
SOIC − D  
Tape and reel  
SN74AC74MDREP  
SAC74MEP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
CLR  
PRE  
L
CLK  
X
D
X
X
X
H
L
Q
H
L
Q
L
H
L
H
X
H
§
§
H
L
L
X
H
H
H
H
H
H
L
L
H
H
H
L
X
Q
Q
0
0
§
This configuration is nonstable; that is, it does not  
persist when either PRE or CLR returns to its  
inactive (high) level.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢎꢡ  
Copyright 2003, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

V62/04617-01XE 替代型号

型号 品牌 替代类型 描述 数据表
SN74AC74MDREP TI

完全替代

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

与V62/04617-01XE相关器件

型号 品牌 获取价格 描述 数据表
V62/04618-01XE TI

获取价格

LOW-VOLTAGE 10-BIT ANALOG-TO-DIGITAL CONVERTER WITH SERIAL CONTROL AND 8 ANALOG INPUTS
V62/04619-01XE TI

获取价格

OCTAL D-TYPE TRANSPARENT LATCH WITH 3-STATE OUTPUTS
V62/04620-01XE TI

获取价格

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
V62/04620-01YE TI

获取价格

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
V62/04620-02XE TI

获取价格

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
V62/04621-01XE TI

获取价格

OCTAL D-TYPE TRANSPARENT LATCH WITH 3-STATE OUTPUTS
V62/04622-01XE TI

获取价格

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
V62/04622-01YE TI

获取价格

OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
V62/04639-01 TI

获取价格

IC VREG 3.3 V FIXED POSITIVE LDO REGULATOR, 1.4 V DROPOUT, PSSO3, PLASTIC, TO-263, 3 PIN,
V62/04641-01XE TI

获取价格

3-V TO 6-V INPUT, 6-A OUTPUT TRACKING SYNCHRO