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UT64BS1X433SPC PDF预览

UT64BS1X433SPC

更新时间: 2024-10-02 00:49:59
品牌 Logo 应用领域
艾法斯 - AEROFLEX ATM异步传输模式
页数 文件大小 规格书
20页 1071K
描述
Matrix-ATM 64-Channel 1-4 Bus Switch

UT64BS1X433SPC 数据手册

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UStaTnd6ard4PBroSdu1ctXs 433 Matrix-A™ 64-Channel 1:4 Bus Switch  
Preliminary Data Sheet  
November 12, 2014  
www.aeroflex.com/busswitch  
FEATURES  
INTRODUCTION  
Interfaces to standard processor memory busses  
Single-chip interface to industry-standard asynchronous  
SRAM and PROM memory devices  
Eliminates need for additional logic or FPGA  
I/O channels functional to 3.3V  
The UT64BS1X433 Matrix-A™ is a 64-Channel, 1:4 Bus  
Switch, that provides bus isolation for up to four banks of 64  
I/Oconnections. Byprovidingbusisolation, theUT64BS1X433  
can significantly reduce the amount of load capacitance seen by  
a host processor and memory devices. The reduction in both  
loadcapacitance and delaytime significantly increase speed and  
performance compared with a discrete logic or FPGA memory  
interface solution.  
R
5 Ohms typical  
ON  
Flat R characteristics over channel voltage  
ON  
Propagation delay 187ps through switch  
Transmission gate technology allows for true bi-directional  
operation  
The UT64BS1X433 operates from a single 3.3V supply. The  
bus channels can pass any voltage between V and V  
,
SS  
DD  
allowing the switching of signals using other standards, such as  
LVCMOS 1.8V.  
Bus holders maintain output states on all 64 channels when  
de-selected  
Logic power 1mW/MHz  
The UT64BS1X433 has two modes of operation. In mode 0, the  
device uses five address and one chip select line to electrically  
connect the input bank to one of four output banks and generate  
1 of 32 chip select outputs. In mode 1, the device uses eight  
address and two chip select lines to independently control two  
pairs of two banks with each bank pair controlled by one of the  
two chip selects. Mode 1 allows the device to interface two  
different types of memory having different address bus  
Independent 5-bit address decoding to select 1 of 32 devices  
Temperature range -55°C to 125°C  
Operational environment:  
- Intrinsic total-dose: up to 300 krad(Si)  
2
- SEL Immune: <100 MeV-cm /mg @ 125°C  
Packaging options:  
- 400-pin Ceramic Land Grid, Column Grid and Ball  
Grid Array packages; 1mm pitch  
configurations e.g. two PROM banks and two SRAM banks.  
The input and output banks connect via analog channels that  
Standard Microcircuit Drawing 5962-TBD  
- QML Q and V (pending)  
have an R that is nominally 5 Ohms over the entire input  
ON  
voltage range. The flat R eliminates the need to add external  
ON  
series resistors for source impedance termination.  
APPLICATIONS  
The UT64BS1X433 also provides logic to control up to eight  
discrete devices per bank by providing eight individual chip  
selects that are decoded using address lines ASEL[2:0] and  
BSEL[2:0]. Ina fullyutilizedconfiguration, theUT64BS1X433  
can select up to 32 discrete devices and provide bus isolation to  
each bank of eight devices. This makes the device ideally suited  
for use with mutli-chip module memory devices, such as the  
Aeroflex UT8R1/2/4M39 40/80/160Mbit family of SRAM  
devices. Each UT64BS1X433 can interface up to four of the  
Aeroflex 160Mb SRAM MCM devices with any Aeroflex  
LEON processor without the need for additional logic.  
- Microprocessor interfaces that require large amounts of  
memory  
- High-speed applications or systems with large bus  
capacitance  
- Cost-sensitive applications that require bus isolation  
without an expensive FPGA  
1
36-00-03-001  
Aeroflex Microelectronics Solutions - HiRel  

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