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UT62L6416MC-55LLE PDF预览

UT62L6416MC-55LLE

更新时间: 2024-11-03 08:21:35
品牌 Logo 应用领域
其他 - ETC 内存集成电路静态存储器光电二极管
页数 文件大小 规格书
12页 194K
描述
64K X 16 BIT LOW POWER CMOS SRAM

UT62L6416MC-55LLE 数据手册

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UTRON  
UT62L6416  
64K X 16 BIT LOW POWER CMOS SRAM  
Preliminary Rev. 0.1  
FEATURES  
GENERAL DESCRIPTION  
The UT62L6416 is a 1,048,576-bit low power  
CMOS static random access memory organized  
as 65,536 words by 16 bits.  
Fast access time :  
55ns(max) for Vcc=3.0V~3.6V  
70/100ns(max) for Vcc=2.7V~3.6V  
CMOS Low operating power  
The UT62L6416 operates from a single 2.7V ~  
3.6V power supply and all inputs and outputs are  
fully TTL compatible.  
Operating current: 45/35/25mA (Icc max)  
Standby current: 20 uA(TYP.) L-version  
3 uA(TYP.) LL-version  
Single 2.7V~3.6V power supply  
Operating temperature:  
The UT62L6416 is design for upper and low byte  
access by data byte control(  
).  
UB LB  
Commercial : 0 ~70  
Extended : -20 ~80  
All inputs and outputs TTL compatible  
Fully static operation  
PIN DESCRIPTION  
Three state outputs  
Data retention voltage: 1.5V (min)  
SYMBOL  
DESCRIPTION  
Address Inputs  
Data byte control :  
(I/O1~I/O8)  
(I/O9~I/O16)  
LB  
UB  
A0 - A15  
I/O1 - I/O16  
Data Inputs/Outputs  
Chip Enable Input  
Write Enable Input  
Output Enable Input  
Lower-Byte Control  
High-Byte Control  
Package : 44-pin 400mil TSOP  
CE  
WE  
OE  
LB  
UB  
VCC  
VSS  
NC  
48-pin 6mm × 8mm TFBGA  
FUNCTIONAL BLOCK DIAGRAM  
Power Supply  
A0  
Ground  
A1  
A2  
No Connection  
A3  
.
V
MEMORY ARRAY  
CC  
A4  
ROW  
1024 Rows x 64 Columns x 16 bits  
.
.
A8  
DECODER  
V
SS  
A12  
A13  
A14  
A15  
. . .  
COLUMNI/O  
I/O  
I/O1  
.
.
.
.
.
.
.
.
.
CONTROL  
I/O16  
COLUMN DECODER  
CE  
WE  
OE  
LOGIC  
CONTROL  
LB  
UB  
A11 A10 A9 A7 A6 A5  
UTRON TECHNOLOGY INC.  
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.  
TEL: 886-3-5777882 FAX: 886-3-5777919  
P80073  
1

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