Datasheet > UT62L2568(I)

UT62L2568(I)

更新时间： 2024-09-30 23:41:07

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
13页	133K
描述
ASYNCHRONOUS STATIC RAM- High Speed

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UT62L2568(I) 数据手册

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UTRON

UT62L2568(I)

256K X 8 BIT LOW POWER CMOS SRAM

Rev. 1.1

REVISION HISTORY

REVISION

Preliminary Rev. 0.1 Original.

DESCRIPTION

Release Date

Nov 28, 2001

Aug 30, 2002

Rev. 1.0

1.Add fast access time : 100ns

2.Revise “FEATURES” Operating :

40/25ꢀ40/35/25mA (Icc max.)

3.Revise “FEATURES” Standby :

℃ ℃

L -version : T_A=0 ~50 ,20 uA(max.)ꢀ20 uA(TYP.)

℃

LL-version : T_A=0 ~50 , 3 uA(max.) ꢀ2 uA(TYP.)

4.Revise 36 TFBGA Outline Dimension ball size :

0.3mmꢀ0.35mm

Rev. 1.1

1.Revised “FEATURES” Operating current :

40/35/25mA(I_CCmax)ꢀ20/18/15mA (I_CCtyp.)

2.TRUTH TABLE & DC ELECTRICAL : Delete I_SB2

3.Revised V_TERM: -0.5 to Vcc+0.3V ꢀ-0.5 to 4.6V

4.Added V_OH: 2.7V at Vcc=3.0V

Apr 28, 2003

5.Revised DC (I_CCmax) 45/35/25mAꢀ35/30/25mA

(I_CCtyp.) 30/25/20mAꢀ20/18/15mA

6.Add under/overshoot range of V_IL& V_IH

7.Revised AC t_OHZ*@100ns (max): 35nsꢀ30ns

t_WHZ*(max) :30/30/40ꢀ20/25/30ns

8.Revised “Data retention Characteristics” :

I_DR-LL (Typ.) : NAꢀ1uA, I_DR-L (Typ.) : NAꢀ10uA

I_DR-LL (Max.) : 25uAꢀ6uA

t_R(min) : 5nsꢀ”t_RC”

9.Add order information for lead free product

UTRON TECHNOLOGY INC.

P80082

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

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