Datasheet > UT62L25616I

UT62L25616I

更新时间： 2024-11-24 07:05:35

品牌	Logo	应用领域
其他 - ETC		静态存储器
页数	文件大小	规格书
12页	194K
描述
256K X 16 BIT LOW POWER CMOS SRAM

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UT62L25616I 数据手册

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UTRON

UT62L25616(I)

256K X 16 BIT LOW POWER CMOS SRAM

Rev. 1.1

FEATURES

GENERAL DESCRIPTION

The UT62L25616(I) is a 4,194,304-bit low power

CMOS static random access memory organized as

262,144 words by 16 bits.

ꢀ Fast access time : 55/70/100 ns

ꢀ CMOS Low operating power

Operating current: 45/35/25mA (Icc max)

Standby current: 20 uA(TYP.) L-version

3 uA(TYP.) LL-version

The UT62L25616(I) operates from a single 2.7V ~

3.6V power supply and all inputs and outputs are fully

TTL compatible.

ꢀ Single 2.7V~3.6V power supply

ꢀ Operating temperature:

℃

Industrial : -40 ~85

The UT62L25616(I) is designed for low power system

applications. It is particularly suited for use in

high-density high-speed system applications.

ꢀ All inputs and outputs TTL compatible

ꢀ Fully static operation

ꢀ Three state outputs

ꢀ Data retention voltage: 1.5V (min)

PIN DESCRIPTION

ꢀ Data byte control :

(I/O1~I/O8)

(I/O9~I/O16)

Ⅱ

SYMBOL

DESCRIPTION

Address Inputs

ꢀ Package : 44-pin 400mil TSOP

A0 - A17

48-pin 6mm × 8mm TFBGA

I/O1 - I/O16

Data Inputs/Outputs

Chip Enable Input

Write Enable Input

Output Enable Input

Lower-Byte Control

High-Byte Control

V_CC

V_SS

FUNCTIONAL BLOCK DIAGRAM

Power Supply

Ground

MEMORY ARRAY

ROW

No Connection

2048 Rows x 128 Columns x 16 bits

A13

A14

A15

A16

A17

DECODER

. .

I/O

CONTROL

I/O1

COLUMN I/O

I/O16

COLUMN DECODER

LOGIC

CONTROL

A9 A10 A11 A12 A5 A6 A7

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

P80054

12 3 4 5 6 7...12

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